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Aspeed patches :

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* Couple of cleanups
 * New machine properties to define the flash models
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Merge remote-tracking branch 'remotes/legoater/tags/pull-aspeed-20200918' into staging

Aspeed patches :

* Couple of cleanups
* New machine properties to define the flash models

# gpg: Signature made Fri 18 Sep 2020 08:23:19 BST
# gpg:                using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B  0B60 51A3 43C7 CFFB ECA1

* remotes/legoater/tags/pull-aspeed-20200918:
  misc: aspeed_scu: Update AST2600 silicon id register
  hw/arm/aspeed: Add machine properties to define the flash models
  hw/arm/aspeed: Map the UART5 device unconditionally

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2020-09-18 13:36:42 +01:00
commit e883b492c2
5 changed files with 73 additions and 13 deletions
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18
docs/system/arm/aspeed.rst
View File

@ -83,3 +83,21 @@ The image should be attached as an MTD drive. Run :
$ qemu-system-arm -M romulus-bmc -nic user \
-drive file=flash-romulus,format=raw,if=mtd -nographic
Options specific to Aspeed machines are :
* ``execute-in-place`` which emulates the boot from the CE0 flash
device by using the FMC controller to load the instructions, and
not simply from RAM. This takes a little longer.
* ``fmc-model`` to change the FMC Flash model. FW needs support for
the chip model to boot.
* ``spi-model`` to change the SPI Flash model.
For instance, to start the ``ast2500-evb`` machine with a different
FMC chip and a bigger (64M) SPI chip, use :
.. code-block:: bash
-M ast2500-evb,fmc-model=mx25l25635e,spi-model=mx66u51235f

45
hw/arm/aspeed.c
View File

@ -41,6 +41,8 @@ struct AspeedMachineState {
MemoryRegion ram_container;
MemoryRegion max_ram;
bool mmio_exec;
char *fmc_model;
char *spi_model;
};
/* Palmetto hardware value: 0x120CE416 */
@ -332,8 +334,10 @@ static void aspeed_machine_init(MachineState *machine)
"max_ram", max_ram_size - ram_size);
memory_region_add_subregion(&bmc->ram_container, ram_size, &bmc->max_ram);
aspeed_board_init_flashes(&bmc->soc.fmc, amc->fmc_model);
aspeed_board_init_flashes(&bmc->soc.spi[0], amc->spi_model);
aspeed_board_init_flashes(&bmc->soc.fmc, bmc->fmc_model ?
bmc->fmc_model : amc->fmc_model);
aspeed_board_init_flashes(&bmc->soc.spi[0], bmc->spi_model ?
bmc->spi_model : amc->spi_model);
/* Install first FMC flash content as a boot rom. */
if (drive0) {
@ -570,6 +574,34 @@ static void aspeed_machine_instance_init(Object *obj)
ASPEED_MACHINE(obj)->mmio_exec = false;
}
static char *aspeed_get_fmc_model(Object *obj, Error **errp)
{
AspeedMachineState *bmc = ASPEED_MACHINE(obj);
return g_strdup(bmc->fmc_model);
}
static void aspeed_set_fmc_model(Object *obj, const char *value, Error **errp)
{
AspeedMachineState *bmc = ASPEED_MACHINE(obj);
g_free(bmc->fmc_model);
bmc->fmc_model = g_strdup(value);
}
static char *aspeed_get_spi_model(Object *obj, Error **errp)
{
AspeedMachineState *bmc = ASPEED_MACHINE(obj);
return g_strdup(bmc->spi_model);
}
static void aspeed_set_spi_model(Object *obj, const char *value, Error **errp)
{
AspeedMachineState *bmc = ASPEED_MACHINE(obj);
g_free(bmc->spi_model);
bmc->spi_model = g_strdup(value);
}
static void aspeed_machine_class_props_init(ObjectClass *oc)
{
object_class_property_add_bool(oc, "execute-in-place",
@ -577,6 +609,15 @@ static void aspeed_machine_class_props_init(ObjectClass *oc)
aspeed_set_mmio_exec);
object_class_property_set_description(oc, "execute-in-place",
"boot directly from CE0 flash device");
object_class_property_add_str(oc, "fmc-model", aspeed_get_fmc_model,
aspeed_set_fmc_model);
object_class_property_set_description(oc, "fmc-model",
"Change the FMC Flash model");
object_class_property_add_str(oc, "spi-model", aspeed_get_spi_model,
aspeed_set_spi_model);
object_class_property_set_description(oc, "spi-model",
"Change the SPI Flash model");
}
static int aspeed_soc_num_cpus(const char *soc_name)

8
hw/arm/aspeed_ast2600.c
View File

@ -325,11 +325,9 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
}
/* UART - attach an 8250 to the IO space as our UART5 */
if (serial_hd(0)) {
qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_DEV_UART5);
serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2,
uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN);
}
serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2,
aspeed_soc_get_irq(s, ASPEED_DEV_UART5),
38400, serial_hd(0), DEVICE_LITTLE_ENDIAN);
/* I2C */
object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr),

8
hw/arm/aspeed_soc.c
View File

@ -283,11 +283,9 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
}
/* UART - attach an 8250 to the IO space as our UART5 */
if (serial_hd(0)) {
qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_DEV_UART5);
serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2,
uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN);
}
serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2,
aspeed_soc_get_irq(s, ASPEED_DEV_UART5), 38400,
serial_hd(0), DEVICE_LITTLE_ENDIAN);
/* I2C */
object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr),

7
hw/misc/aspeed_scu.c
View File

@ -670,7 +670,12 @@ static void aspeed_ast2600_scu_reset(DeviceState *dev)
memcpy(s->regs, asc->resets, asc->nr_regs * 4);
s->regs[AST2600_SILICON_REV] = s->silicon_rev;
/*
* A0 reports A0 in _REV, but subsequent revisions report A1 regardless
* of actual revision. QEMU and Linux only support A1 onwards so this is
* sufficient.
*/
s->regs[AST2600_SILICON_REV] = AST2600_A1_SILICON_REV;
s->regs[AST2600_SILICON_REV2] = s->silicon_rev;
s->regs[AST2600_HW_STRAP1] = s->hw_strap1;
s->regs[AST2600_HW_STRAP2] = s->hw_strap2;