tcg/sparc: Use constant pool for movi
Signed-off-by: Richard Henderson <rth@twiddle.net>
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ab20bdc116
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e9823b4c33
@ -175,4 +175,6 @@ static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
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void tb_target_set_jmp_target(uintptr_t, uintptr_t, uintptr_t);
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#define TCG_TARGET_NEED_POOL_LABELS
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#endif
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@ -22,6 +22,8 @@
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* THE SOFTWARE.
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*/
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#include "tcg-pool.inc.c"
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#ifdef CONFIG_DEBUG_TCG
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static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
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"%g0",
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@ -292,33 +294,46 @@ static inline int check_fit_i32(int32_t val, unsigned int bits)
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static void patch_reloc(tcg_insn_unit *code_ptr, int type,
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intptr_t value, intptr_t addend)
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{
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uint32_t insn;
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uint32_t insn = *code_ptr;
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intptr_t pcrel;
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tcg_debug_assert(addend == 0);
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value = tcg_ptr_byte_diff((tcg_insn_unit *)value, code_ptr);
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value += addend;
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pcrel = tcg_ptr_byte_diff((tcg_insn_unit *)value, code_ptr);
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switch (type) {
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case R_SPARC_WDISP16:
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if (!check_fit_ptr(value >> 2, 16)) {
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tcg_abort();
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}
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insn = *code_ptr;
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assert(check_fit_ptr(pcrel >> 2, 16));
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insn &= ~INSN_OFF16(-1);
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insn |= INSN_OFF16(value);
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*code_ptr = insn;
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insn |= INSN_OFF16(pcrel);
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break;
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case R_SPARC_WDISP19:
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if (!check_fit_ptr(value >> 2, 19)) {
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tcg_abort();
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}
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insn = *code_ptr;
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assert(check_fit_ptr(pcrel >> 2, 19));
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insn &= ~INSN_OFF19(-1);
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insn |= INSN_OFF19(value);
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*code_ptr = insn;
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insn |= INSN_OFF19(pcrel);
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break;
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case R_SPARC_13:
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/* Note that we're abusing this reloc type for our own needs. */
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if (!check_fit_ptr(value, 13)) {
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int adj = (value > 0 ? 0xff8 : -0x1000);
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value -= adj;
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assert(check_fit_ptr(value, 13));
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*code_ptr++ = (ARITH_ADD | INSN_RD(TCG_REG_T2)
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| INSN_RS1(TCG_REG_TB) | INSN_IMM13(adj));
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insn ^= INSN_RS1(TCG_REG_TB) ^ INSN_RS1(TCG_REG_T2);
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}
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insn &= ~INSN_IMM13(-1);
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insn |= INSN_IMM13(value);
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break;
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case R_SPARC_32:
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/* Note that we're abusing this reloc type for our own needs. */
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code_ptr[0] = deposit32(code_ptr[0], 0, 22, value >> 10);
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code_ptr[1] = deposit32(code_ptr[1], 0, 10, value);
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return;
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default:
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tcg_abort();
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g_assert_not_reached();
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}
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*code_ptr = insn;
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}
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/* parse target specific constraints */
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@ -474,12 +489,24 @@ static void tcg_out_movi_int(TCGContext *s, TCGType type, TCGReg ret,
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return;
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}
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if (USE_REG_TB && !in_prologue) {
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intptr_t diff = arg - (uintptr_t)s->code_gen_ptr;
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if (check_fit_ptr(diff, 13)) {
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tcg_out_arithi(s, ret, TCG_REG_TB, diff, ARITH_ADD);
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return;
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if (!in_prologue) {
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if (USE_REG_TB) {
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intptr_t diff = arg - (uintptr_t)s->code_gen_ptr;
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if (check_fit_ptr(diff, 13)) {
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tcg_out_arithi(s, ret, TCG_REG_TB, diff, ARITH_ADD);
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} else {
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new_pool_label(s, arg, R_SPARC_13, s->code_ptr,
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-(intptr_t)s->code_gen_ptr);
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tcg_out32(s, LDX | INSN_RD(ret) | INSN_RS1(TCG_REG_TB));
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/* May be used to extend the 13-bit range in patch_reloc. */
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tcg_out32(s, NOP);
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}
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} else {
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new_pool_label(s, arg, R_SPARC_32, s->code_ptr, 0);
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tcg_out_sethi(s, ret, 0);
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tcg_out32(s, LDX | INSN_RD(ret) | INSN_RS1(ret) | INSN_IMM13(0));
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}
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return;
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}
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/* A 64-bit constant decomposed into 2 32-bit pieces. */
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@ -1058,6 +1085,14 @@ static void tcg_target_qemu_prologue(TCGContext *s)
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#endif
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}
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static void tcg_out_nop_fill(tcg_insn_unit *p, int count)
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{
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int i;
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for (i = 0; i < count; ++i) {
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p[i] = NOP;
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}
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}
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#if defined(CONFIG_SOFTMMU)
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/* Perform the TLB load and compare.
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