From ea0a4f34418c9f2cad9722bb27acd6349148fac0 Mon Sep 17 00:00:00 2001 From: Paul Burton Date: Fri, 14 Jun 2013 08:30:48 +0100 Subject: [PATCH] pflash_cfi01: duplicate status byte from bits 23:16 for 32bit reads The firmware commonly used with MIPS Malta boards (YAMON) reads the status of the pflash with a 32bit memory access. On real hardware this results in the status byte being mirrored in the upper 16 bits of the read value. For example if the status byte is represented by SS then the hardware reads 0x00SS00SS. The YAMON firmware compares the status against 32bit values expecting the mirrored value and fails without it. Signed-off-by: Paul Burton Signed-off-by: Leon Alrae Signed-off-by: Aurelien Jarno --- hw/block/pflash_cfi01.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 2bcd7318bc..29738598ac 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -192,6 +192,9 @@ static uint32_t pflash_read (pflash_t *pfl, hwaddr offset, case 0xe8: /* Write block */ /* Status register read */ ret = pfl->status; + if (width > 2) { + ret |= pfl->status << 16; + } DPRINTF("%s: status %x\n", __func__, ret); break; case 0x90: