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target-s390: Convert EFPC, STFPC 

Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Richard Henderson 2012-08-22 14:09:05 -07:00
parent 0c2400155b
commit ea20490fdd
2 changed files with 19 additions and 25 deletions
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6
target-s390x/insn-data.def
View File

@ -175,6 +175,9 @@
/* EXECUTE RELATIVE LONG */
C(0xc600, EXRL, RIL_b, EE, r1_o, ri2, 0, 0, ex, 0)
/* EXTRACT FPC */
C(0xb38c, EFPC, RRE, Z, 0, 0, new, r1_32, efpc, 0)
/* INSERT CHARACTER */
C(0x4300, IC, RX_a, Z, 0, m2_8u, 0, r1_8, mov2, 0)
C(0xe373, ICY, RXY_a, LD, 0, m2_8u, 0, r1_8, mov2, 0)
@ -395,6 +398,9 @@
/* STORE HALFWORD RELATIVE LONG */
C(0xc407, STHRL, RIL_b, GIE, r1_o, ri2, 0, 0, st16, 0)
/* STORE FPC */
C(0xb29c, STFPC, S, Z, 0, a2, new, m2_32, efpc, 0)
/* STORE MULTIPLE */
D(0x9000, STM, RS_a, Z, 0, a2, 0, 0, stm, 0, 4)
D(0xeb90, STMY, RSY_a, LD, 0, a2, 0, 0, stm, 0, 4)

38
target-s390x/translate.c
View File

@ -1839,12 +1839,6 @@ static void disas_b3(CPUS390XState *env, DisasContext *s, int op, int m3,
tcg_gen_st_i32(tmp32_1, cpu_env, offsetof(CPUS390XState, fpc));
tcg_temp_free_i32(tmp32_1);
break;
case 0x8c: /* EFPC R1 [RRE] */
tmp32_1 = tcg_temp_new_i32();
tcg_gen_ld_i32(tmp32_1, cpu_env, offsetof(CPUS390XState, fpc));
store_reg32(r1, tmp32_1);
tcg_temp_free_i32(tmp32_1);
break;
case 0x94: /* CEFBR R1,R2 [RRE] */
case 0x95: /* CDFBR R1,R2 [RRE] */
case 0x96: /* CXFBR R1,R2 [RRE] */
@ -1997,7 +1991,7 @@ static void disas_b9(CPUS390XState *env, DisasContext *s, int op, int r1,
static void disas_s390_insn(CPUS390XState *env, DisasContext *s)
{
TCGv_i64 tmp, tmp2;
TCGv_i64 tmp;
TCGv_i32 tmp32_1, tmp32_2;
unsigned char opc;
uint64_t insn;
@ -2010,24 +2004,7 @@ static void disas_s390_insn(CPUS390XState *env, DisasContext *s)
case 0xb2:
insn = ld_code4(env, s->pc);
op = (insn >> 16) & 0xff;
switch (op) {
case 0x9c: /* STFPC D2(B2) [S] */
d2 = insn & 0xfff;
b2 = (insn >> 12) & 0xf;
tmp32_1 = tcg_temp_new_i32();
tmp = tcg_temp_new_i64();
tmp2 = get_address(s, 0, b2, d2);
tcg_gen_ld_i32(tmp32_1, cpu_env, offsetof(CPUS390XState, fpc));
tcg_gen_extu_i32_i64(tmp, tmp32_1);
tcg_gen_qemu_st32(tmp, tmp2, get_mem_index(s));
tcg_temp_free_i32(tmp32_1);
tcg_temp_free_i64(tmp);
tcg_temp_free_i64(tmp2);
break;
default:
disas_b2(env, s, op, insn);
break;
}
disas_b2(env, s, op, insn);
break;
case 0xb3:
insn = ld_code4(env, s->pc);
@ -2774,6 +2751,12 @@ static ExitStatus op_divu64(DisasContext *s, DisasOps *o)
return NO_EXIT;
}
static ExitStatus op_efpc(DisasContext *s, DisasOps *o)
{
tcg_gen_ld32u_i64(o->out, cpu_env, offsetof(CPUS390XState, fpc));
return NO_EXIT;
}
static ExitStatus op_ex(DisasContext *s, DisasOps *o)
{
/* ??? Perhaps a better way to implement EXECUTE is to set a bit in
@ -3700,6 +3683,11 @@ static void wout_m1_64(DisasContext *s, DisasFields *f, DisasOps *o)
tcg_gen_qemu_st64(o->out, o->addr1, get_mem_index(s));
}
static void wout_m2_32(DisasContext *s, DisasFields *f, DisasOps *o)
{
tcg_gen_qemu_st32(o->out, o->in2, get_mem_index(s));
}
/* ====================================================================== */
/* The "INput 1" generators. These load the first operand to an insn. */