target-ppc: gdbstub: fix altivec registers for little-endian guests
Altivec registers are 128-bit wide. They are stored in memory as two 64-bit values that must be byteswapped when the guest is little-endian. Let's reuse the ppc_maybe_bswap_register() helper for this. We also need to fix the ordering of the 64-bit elements according to the target endianness, for both system and user mode. Signed-off-by: Greg Kurz <gkurz@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -8753,9 +8753,9 @@ static void dump_ppc_insns (CPUPPCState *env)
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static bool avr_need_swap(CPUPPCState *env)
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{
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#ifdef HOST_WORDS_BIGENDIAN
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return false;
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return msr_le;
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#else
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return true;
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return !msr_le;
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#endif
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}
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@ -8799,14 +8799,18 @@ static int gdb_get_avr_reg(CPUPPCState *env, uint8_t *mem_buf, int n)
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stq_p(mem_buf, env->avr[n].u64[1]);
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stq_p(mem_buf+8, env->avr[n].u64[0]);
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}
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ppc_maybe_bswap_register(env, mem_buf, 8);
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ppc_maybe_bswap_register(env, mem_buf + 8, 8);
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return 16;
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}
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if (n == 32) {
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stl_p(mem_buf, env->vscr);
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ppc_maybe_bswap_register(env, mem_buf, 4);
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return 4;
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}
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if (n == 33) {
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stl_p(mem_buf, (uint32_t)env->spr[SPR_VRSAVE]);
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ppc_maybe_bswap_register(env, mem_buf, 4);
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return 4;
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}
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return 0;
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@ -8815,6 +8819,8 @@ static int gdb_get_avr_reg(CPUPPCState *env, uint8_t *mem_buf, int n)
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static int gdb_set_avr_reg(CPUPPCState *env, uint8_t *mem_buf, int n)
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{
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if (n < 32) {
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ppc_maybe_bswap_register(env, mem_buf, 8);
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ppc_maybe_bswap_register(env, mem_buf + 8, 8);
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if (!avr_need_swap(env)) {
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env->avr[n].u64[0] = ldq_p(mem_buf);
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env->avr[n].u64[1] = ldq_p(mem_buf+8);
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@ -8825,10 +8831,12 @@ static int gdb_set_avr_reg(CPUPPCState *env, uint8_t *mem_buf, int n)
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return 16;
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}
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if (n == 32) {
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ppc_maybe_bswap_register(env, mem_buf, 4);
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env->vscr = ldl_p(mem_buf);
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return 4;
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}
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if (n == 33) {
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ppc_maybe_bswap_register(env, mem_buf, 4);
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env->spr[SPR_VRSAVE] = (target_ulong)ldl_p(mem_buf);
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return 4;
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}
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