virtio-pci: Add Function Level Reset support
Using FLR becomes convenient in cases where resetting the bus is impractical, for example, when debugging the behavior of individual functions. Signed-off-by: Julia Suvorova <jusual@redhat.com> Message-Id: <20190820163005.1880-1-jusual@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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@ -27,7 +27,9 @@
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#include "hw/pci/pci.h"
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#include "hw/pci/pci.h"
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#include "hw/mem/nvdimm.h"
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#include "hw/mem/nvdimm.h"
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GlobalProperty hw_compat_4_1[] = {};
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GlobalProperty hw_compat_4_1[] = {
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{ "virtio-pci", "x-pcie-flr-init", "off" },
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};
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const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1);
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const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1);
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GlobalProperty hw_compat_4_0[] = {
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GlobalProperty hw_compat_4_0[] = {
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@ -601,6 +601,10 @@ static void virtio_write_config(PCIDevice *pci_dev, uint32_t address,
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pci_default_write_config(pci_dev, address, val, len);
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pci_default_write_config(pci_dev, address, val, len);
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if (proxy->flags & VIRTIO_PCI_FLAG_INIT_FLR) {
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pcie_cap_flr_write_config(pci_dev, address, val, len);
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}
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if (range_covers_byte(address, len, PCI_COMMAND) &&
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if (range_covers_byte(address, len, PCI_COMMAND) &&
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!(pci_dev->config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
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!(pci_dev->config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
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virtio_pci_stop_ioeventfd(proxy);
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virtio_pci_stop_ioeventfd(proxy);
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@ -1777,6 +1781,10 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
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pcie_ats_init(pci_dev, 256);
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pcie_ats_init(pci_dev, 256);
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}
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}
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if (proxy->flags & VIRTIO_PCI_FLAG_INIT_FLR) {
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/* Set Function Level Reset capability bit */
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pcie_cap_flr_init(pci_dev);
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}
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} else {
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} else {
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/*
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/*
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* make future invocations of pci_is_express() return false
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* make future invocations of pci_is_express() return false
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@ -1844,6 +1852,8 @@ static Property virtio_pci_properties[] = {
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VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, true),
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VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, true),
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DEFINE_PROP_BIT("x-pcie-pm-init", VirtIOPCIProxy, flags,
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DEFINE_PROP_BIT("x-pcie-pm-init", VirtIOPCIProxy, flags,
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VIRTIO_PCI_FLAG_INIT_PM_BIT, true),
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VIRTIO_PCI_FLAG_INIT_PM_BIT, true),
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DEFINE_PROP_BIT("x-pcie-flr-init", VirtIOPCIProxy, flags,
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VIRTIO_PCI_FLAG_INIT_FLR_BIT, true),
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DEFINE_PROP_END_OF_LIST(),
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DEFINE_PROP_END_OF_LIST(),
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};
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};
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@ -44,6 +44,7 @@ enum {
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VIRTIO_PCI_FLAG_INIT_DEVERR_BIT,
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VIRTIO_PCI_FLAG_INIT_DEVERR_BIT,
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VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT,
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VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT,
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VIRTIO_PCI_FLAG_INIT_PM_BIT,
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VIRTIO_PCI_FLAG_INIT_PM_BIT,
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VIRTIO_PCI_FLAG_INIT_FLR_BIT,
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};
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};
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/* Need to activate work-arounds for buggy guests at vmstate load. */
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/* Need to activate work-arounds for buggy guests at vmstate load. */
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@ -80,6 +81,9 @@ enum {
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/* Init Power Management */
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/* Init Power Management */
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#define VIRTIO_PCI_FLAG_INIT_PM (1 << VIRTIO_PCI_FLAG_INIT_PM_BIT)
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#define VIRTIO_PCI_FLAG_INIT_PM (1 << VIRTIO_PCI_FLAG_INIT_PM_BIT)
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/* Init Function Level Reset capability */
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#define VIRTIO_PCI_FLAG_INIT_FLR (1 << VIRTIO_PCI_FLAG_INIT_FLR_BIT)
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typedef struct {
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typedef struct {
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MSIMessage msg;
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MSIMessage msg;
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int virq;
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int virq;
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