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mos6522: switch over to use qdev gpios for IRQs 

For historical reasons each mos6522 instance implements its own setting and
update of the IFR flag bits using methods exposed by MOS6522DeviceClass. As
of today this is no longer required, and it is now possible to implement
the mos6522 IRQs as standard qdev gpios.

Switch over to use qdev gpios for the mos6522 device and update all instances
accordingly.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20220305150957.5053-5-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
This commit is contained in:
Mark Cave-Ayland 2022-03-05 15:09:49 +00:00
parent e787221ebf
commit ebe5bca2ef
6 changed files with 31 additions and 56 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

56
hw/misc/mac_via.c
View File

@ -325,10 +325,9 @@ static void via1_sixty_hz(void *opaque)
{
MOS6522Q800VIA1State *v1s = opaque;
MOS6522State *s = MOS6522(v1s);
MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(s);
qemu_irq irq = qdev_get_gpio_in(DEVICE(s), VIA1_IRQ_60HZ_BIT);
s->ifr |= VIA1_IRQ_60HZ;
mdc->update_irq(s);
qemu_set_irq(irq, 1);
via1_sixty_hz_update(v1s);
}
@ -337,44 +336,13 @@ static void via1_one_second(void *opaque)
{
MOS6522Q800VIA1State *v1s = opaque;
MOS6522State *s = MOS6522(v1s);
MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(s);
qemu_irq irq = qdev_get_gpio_in(DEVICE(s), VIA1_IRQ_ONE_SECOND_BIT);
s->ifr |= VIA1_IRQ_ONE_SECOND;
mdc->update_irq(s);
qemu_set_irq(irq, 1);
via1_one_second_update(v1s);
}
static void via1_irq_request(void *opaque, int irq, int level)
{
MOS6522Q800VIA1State *v1s = opaque;
MOS6522State *s = MOS6522(v1s);
MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(s);
if (level) {
s->ifr |= 1 << irq;
} else {
s->ifr &= ~(1 << irq);
}
mdc->update_irq(s);
}
static void via2_irq_request(void *opaque, int irq, int level)
{
MOS6522Q800VIA2State *v2s = opaque;
MOS6522State *s = MOS6522(v2s);
MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(s);
if (level) {
s->ifr |= 1 << irq;
} else {
s->ifr &= ~(1 << irq);
}
mdc->update_irq(s);
}
static void pram_update(MOS6522Q800VIA1State *v1s)
{
@ -1061,8 +1029,6 @@ static void mos6522_q800_via1_init(Object *obj)
qbus_init((BusState *)&v1s->adb_bus, sizeof(v1s->adb_bus),
TYPE_ADB_BUS, DEVICE(v1s), "adb.0");
qdev_init_gpio_in(DEVICE(obj), via1_irq_request, VIA1_IRQ_NB);
/* A/UX mode */
qdev_init_gpio_out(DEVICE(obj), &v1s->auxmode_irq, 1);
}
@ -1150,22 +1116,20 @@ static void mos6522_q800_via2_reset(DeviceState *dev)
ms->a = 0x7f;
}
static void via2_nubus_irq_request(void *opaque, int irq, int level)
static void via2_nubus_irq_request(void *opaque, int n, int level)
{
MOS6522Q800VIA2State *v2s = opaque;
MOS6522State *s = MOS6522(v2s);
MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(s);
qemu_irq irq = qdev_get_gpio_in(DEVICE(s), VIA2_IRQ_NUBUS_BIT);
if (level) {
/* Port A nubus IRQ inputs are active LOW */
s->a &= ~(1 << irq);
s->ifr |= 1 << VIA2_IRQ_NUBUS_BIT;
s->a &= ~(1 << n);
} else {
s->a |= (1 << irq);
s->ifr &= ~(1 << VIA2_IRQ_NUBUS_BIT);
s->a |= (1 << n);
}
mdc->update_irq(s);
qemu_set_irq(irq, level);
}
static void mos6522_q800_via2_init(Object *obj)
@ -1177,8 +1141,6 @@ static void mos6522_q800_via2_init(Object *obj)
"via2", VIA_SIZE);
sysbus_init_mmio(sbd, &v2s->via_mem);
qdev_init_gpio_in(DEVICE(obj), via2_irq_request, VIA2_IRQ_NB);
qdev_init_gpio_in_named(DEVICE(obj), via2_nubus_irq_request, "nubus-irq",
VIA2_NUBUS_IRQ_NB);
}

5
hw/misc/macio/cuda.c
View File

@ -24,6 +24,7 @@
*/
#include "qemu/osdep.h"
#include "hw/irq.h"
#include "hw/ppc/mac.h"
#include "hw/qdev-properties.h"
#include "migration/vmstate.h"
@ -96,9 +97,9 @@ static void cuda_set_sr_int(void *opaque)
CUDAState *s = opaque;
MOS6522CUDAState *mcs = &s->mos6522_cuda;
MOS6522State *ms = MOS6522(mcs);
MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(ms);
qemu_irq irq = qdev_get_gpio_in(DEVICE(ms), SR_INT_BIT);
mdc->set_sr_int(ms);
qemu_set_irq(irq, 1);
}
static void cuda_delay_set_sr_int(CUDAState *s)

4
hw/misc/macio/pmu.c
View File

@ -75,9 +75,9 @@ static void via_set_sr_int(void *opaque)
PMUState *s = opaque;
MOS6522PMUState *mps = MOS6522_PMU(&s->mos6522_pmu);
MOS6522State *ms = MOS6522(mps);
MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(ms);
qemu_irq irq = qdev_get_gpio_in(DEVICE(ms), SR_INT_BIT);
mdc->set_sr_int(ms);
qemu_set_irq(irq, 1);
}
static void pmu_update_extirq(PMUState *s)

15
hw/misc/mos6522.c
View File

@ -52,6 +52,19 @@ static void mos6522_update_irq(MOS6522State *s)
}
}
static void mos6522_set_irq(void *opaque, int n, int level)
{
MOS6522State *s = MOS6522(opaque);
if (level) {
s->ifr |= 1 << n;
} else {
s->ifr &= ~(1 << n);
}
mos6522_update_irq(s);
}
static uint64_t get_counter_value(MOS6522State *s, MOS6522Timer *ti)
{
MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(s);
@ -488,6 +501,8 @@ static void mos6522_init(Object *obj)
s->timers[0].timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, mos6522_timer1, s);
s->timers[1].timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, mos6522_timer2, s);
qdev_init_gpio_in(DEVICE(obj), mos6522_set_irq, VIA_NUM_INTS);
}
static void mos6522_finalize(Object *obj)

5
include/hw/misc/mac_via.h
View File

@ -24,8 +24,6 @@
#define VIA1_IRQ_ADB_DATA_BIT CB2_INT_BIT
#define VIA1_IRQ_ADB_CLOCK_BIT CB1_INT_BIT
#define VIA1_IRQ_NB 8
#define VIA1_IRQ_ONE_SECOND BIT(VIA1_IRQ_ONE_SECOND_BIT)
#define VIA1_IRQ_60HZ BIT(VIA1_IRQ_60HZ_BIT)
#define VIA1_IRQ_ADB_READY BIT(VIA1_IRQ_ADB_READY_BIT)
@ -42,7 +40,6 @@ struct MOS6522Q800VIA1State {
MemoryRegion via_mem;
qemu_irq irqs[VIA1_IRQ_NB];
qemu_irq auxmode_irq;
uint8_t last_b;
@ -85,8 +82,6 @@ struct MOS6522Q800VIA1State {
#define VIA2_IRQ_SCSI_BIT CB2_INT_BIT
#define VIA2_IRQ_ASC_BIT CB1_INT_BIT
#define VIA2_IRQ_NB 8
#define VIA2_IRQ_SCSI_DATA BIT(VIA2_IRQ_SCSI_DATA_BIT)
#define VIA2_IRQ_NUBUS BIT(VIA2_IRQ_NUBUS_BIT)
#define VIA2_IRQ_UNUSED BIT(VIA2_IRQ_SCSI_BIT)

2
include/hw/misc/mos6522.h
View File

@ -57,6 +57,8 @@
#define T2_INT BIT(T2_INT_BIT)
#define T1_INT BIT(T1_INT_BIT)
#define VIA_NUM_INTS 5
/* Bits in ACR */
#define T1MODE 0xc0 /* Timer 1 mode */
#define T1MODE_CONT 0x40 /* continuous interrupts */