pl050: split pl050_update_irq() into separate pl050_set_irq() and pl050_update_irq() functions

This will soon allow pl050_set_irq() to be used as a GPIO input function.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Helge Deller <deller@gmx.de>
Message-Id: <20220624134109.881989-16-mark.cave-ayland@ilande.co.uk>
This commit is contained in:
Mark Cave-Ayland 2022-06-24 14:40:30 +01:00
parent 600f71109d
commit eca9e8702b

View File

@ -57,15 +57,20 @@ static const unsigned char pl050_id[] = {
0x50, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1
};
static void pl050_update(void *opaque, int level)
static void pl050_update_irq(PL050State *s)
{
int level = (s->pending && (s->cr & 0x10) != 0)
|| (s->cr & 0x08) != 0;
qemu_set_irq(s->irq, level);
}
static void pl050_set_irq(void *opaque, int level)
{
PL050State *s = (PL050State *)opaque;
int raise;
s->pending = level;
raise = (s->pending && (s->cr & 0x10) != 0)
|| (s->cr & 0x08) != 0;
qemu_set_irq(s->irq, raise);
pl050_update_irq(s);
}
static uint64_t pl050_read(void *opaque, hwaddr offset,
@ -124,7 +129,7 @@ static void pl050_write(void *opaque, hwaddr offset,
switch (offset >> 2) {
case 0: /* KMICR */
s->cr = value;
pl050_update(s, s->pending);
pl050_update_irq(s);
/* ??? Need to implement the enable/disable bit. */
break;
case 2: /* KMIDATA */
@ -159,9 +164,9 @@ static void pl050_realize(DeviceState *dev, Error **errp)
sysbus_init_mmio(sbd, &s->iomem);
sysbus_init_irq(sbd, &s->irq);
if (s->is_mouse) {
s->dev = ps2_mouse_init(pl050_update, s);
s->dev = ps2_mouse_init(pl050_set_irq, s);
} else {
s->dev = ps2_kbd_init(pl050_update, s);
s->dev = ps2_kbd_init(pl050_set_irq, s);
}
}