Some more regs_to_env/envs_to_regs cleanup.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2937 c046a42c-6fe2-441c-8c8c-71466251a162
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cpu-exec.c
36
cpu-exec.c
@ -263,28 +263,27 @@ int cpu_exec(CPUState *env1)
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asm volatile ("mov %%i7, %0" : "=r" (saved_i7));
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asm volatile ("mov %%i7, %0" : "=r" (saved_i7));
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#endif
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#endif
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#if defined(TARGET_I386)
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env_to_regs();
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env_to_regs();
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#if defined(TARGET_I386)
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/* put eflags in CPU temporary format */
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/* put eflags in CPU temporary format */
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CC_SRC = env->eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
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CC_SRC = env->eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
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DF = 1 - (2 * ((env->eflags >> 10) & 1));
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DF = 1 - (2 * ((env->eflags >> 10) & 1));
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CC_OP = CC_OP_EFLAGS;
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CC_OP = CC_OP_EFLAGS;
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env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
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env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
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#elif defined(TARGET_ARM)
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#elif defined(TARGET_SPARC)
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#elif defined(TARGET_SPARC)
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#if defined(reg_REGWPTR)
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#if defined(reg_REGWPTR)
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saved_regwptr = REGWPTR;
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saved_regwptr = REGWPTR;
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#endif
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#endif
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#elif defined(TARGET_PPC)
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#elif defined(TARGET_M68K)
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#elif defined(TARGET_M68K)
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env->cc_op = CC_OP_FLAGS;
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env->cc_op = CC_OP_FLAGS;
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env->cc_dest = env->sr & 0xf;
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env->cc_dest = env->sr & 0xf;
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env->cc_x = (env->sr >> 4) & 1;
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env->cc_x = (env->sr >> 4) & 1;
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#elif defined(TARGET_ALPHA)
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#elif defined(TARGET_ARM)
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#elif defined(TARGET_PPC)
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#elif defined(TARGET_MIPS)
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#elif defined(TARGET_MIPS)
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#elif defined(TARGET_SH4)
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#elif defined(TARGET_SH4)
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/* XXXXX */
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/* XXXXX */
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#elif defined(TARGET_ALPHA)
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env_to_regs();
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#else
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#else
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#error unsupported target CPU
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#error unsupported target CPU
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#endif
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#endif
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@ -522,32 +521,9 @@ int cpu_exec(CPUState *env1)
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}
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}
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#ifdef DEBUG_EXEC
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#ifdef DEBUG_EXEC
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if ((loglevel & CPU_LOG_TB_CPU)) {
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if ((loglevel & CPU_LOG_TB_CPU)) {
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#if defined(TARGET_I386)
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/* restore flags in standard format */
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/* restore flags in standard format */
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#ifdef reg_EAX
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regs_to_env();
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env->regs[R_EAX] = EAX;
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#if defined(TARGET_I386)
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#endif
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#ifdef reg_EBX
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env->regs[R_EBX] = EBX;
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#endif
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#ifdef reg_ECX
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env->regs[R_ECX] = ECX;
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#endif
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#ifdef reg_EDX
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env->regs[R_EDX] = EDX;
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#endif
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#ifdef reg_ESI
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env->regs[R_ESI] = ESI;
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#endif
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#ifdef reg_EDI
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env->regs[R_EDI] = EDI;
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#endif
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#ifdef reg_EBP
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env->regs[R_EBP] = EBP;
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#endif
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#ifdef reg_ESP
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env->regs[R_ESP] = ESP;
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#endif
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env->eflags = env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
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env->eflags = env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
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cpu_dump_state(env, logfile, fprintf, X86_DUMP_CCOP);
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cpu_dump_state(env, logfile, fprintf, X86_DUMP_CCOP);
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env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
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env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
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