hw/misc/aspeed_hace: Do not crash if address_space_map() failed
address_space_map() can fail: uart:~$ hash test sha256_test tv[0]: Segmentation fault: 11 Thread 3 "qemu-system-arm" received signal SIGSEGV, Segmentation fault. gen_acc_mode_iov (req_len=0x7ffff18b7778, id=<optimized out>, iov=0x7ffff18b7780, s=0x555556ce0bd0) at ../hw/misc/aspeed_hace.c:171 171 if (has_padding(s, &iov[id], *req_len, &total_msg_len, &pad_offset)) { (gdb) bt #0 gen_acc_mode_iov (req_len=0x7ffff18b7778, id=<optimized out>, iov=0x7ffff18b7780, s=0x555556ce0bd0) at ../hw/misc/aspeed_hace.c:171 #1 do_hash_operation (s=s@entry=0x555556ce0bd0, algo=3, sg_mode=sg_mode@entry=true, acc_mode=acc_mode@entry=true) at ../hw/misc/aspeed_hace.c:224 #2 0x00005555559bdbb8 in aspeed_hace_write (opaque=<optimized out>, addr=12, data=262488, size=<optimized out>) at ../hw/misc/aspeed_hace.c:358 This change doesn't fix much, but at least the guest can't crash QEMU anymore. Instead it is still usable: uart:~$ hash test sha256_test tv[0]:hash_final error sha384_test tv[0]:hash_final error sha512_test tv[0]:hash_final error [00:00:06.278,000] <err> hace_global: HACE poll timeout [00:00:09.324,000] <err> hace_global: HACE poll timeout [00:00:12.261,000] <err> hace_global: HACE poll timeout uart:~$ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Delevoryas <peter@pjd.dev> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
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@ -193,6 +193,7 @@ static void do_hash_operation(AspeedHACEState *s, int algo, bool sg_mode,
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size_t digest_len = 0;
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int niov = 0;
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int i;
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void *haddr;
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if (sg_mode) {
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uint32_t len = 0;
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@ -217,9 +218,13 @@ static void do_hash_operation(AspeedHACEState *s, int algo, bool sg_mode,
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addr &= SG_LIST_ADDR_MASK;
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plen = len & SG_LIST_LEN_MASK;
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iov[i].iov_base = address_space_map(&s->dram_as, addr, &plen, false,
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haddr = address_space_map(&s->dram_as, addr, &plen, false,
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MEMTXATTRS_UNSPECIFIED);
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if (haddr == NULL) {
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qemu_log_mask(LOG_GUEST_ERROR, "%s: qcrypto failed\n", __func__);
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return;
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}
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iov[i].iov_base = haddr;
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if (acc_mode) {
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niov = gen_acc_mode_iov(s, iov, i, &plen);
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@ -230,10 +235,14 @@ static void do_hash_operation(AspeedHACEState *s, int algo, bool sg_mode,
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} else {
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hwaddr len = s->regs[R_HASH_SRC_LEN];
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haddr = address_space_map(&s->dram_as, s->regs[R_HASH_SRC],
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&len, false, MEMTXATTRS_UNSPECIFIED);
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if (haddr == NULL) {
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qemu_log_mask(LOG_GUEST_ERROR, "%s: qcrypto failed\n", __func__);
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return;
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}
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iov[0].iov_base = haddr;
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iov[0].iov_len = len;
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iov[0].iov_base = address_space_map(&s->dram_as, s->regs[R_HASH_SRC],
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&len, false,
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MEMTXATTRS_UNSPECIFIED);
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i = 1;
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if (s->iov_count) {
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