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target/riscv: Add ePMP support for the Ibex CPU

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The physical Ibex CPU has ePMP support and it's enabled for the
OpenTitan machine so let's enable ePMP support for the Ibex CPU in QEMU.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id: d426baabab0c9361ed2e989dbe416e417a551fd1.1618812899.git.alistair.francis@wdc.com
This commit is contained in:
Alistair Francis 2021-04-19 16:18:06 +10:00
parent 8ab6d3fbfe
commit ed6eebaaaf
1 changed files with 1 additions and 0 deletions
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target/riscv/cpu.c
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@ -202,6 +202,7 @@ static void rv32_ibex_cpu_init(Object *obj)
set_misa(env, RV32 | RVI | RVM | RVC | RVU); set_misa(env, RV32 | RVI | RVM | RVC | RVU);
set_priv_version(env, PRIV_VERSION_1_10_0); set_priv_version(env, PRIV_VERSION_1_10_0);
qdev_prop_set_bit(DEVICE(obj), "mmu", false); qdev_prop_set_bit(DEVICE(obj), "mmu", false);
qdev_prop_set_bit(DEVICE(obj), "x-epmp", true);
} }
static void rv32_imafcu_nommu_cpu_init(Object *obj) static void rv32_imafcu_nommu_cpu_init(Object *obj)