target-ppc: Add VSX Floating Point to Floating Point Conversion Instructions
This patch adds the VSX instructions that convert between floating point formats: xscvdpsp, xscvspdp, xvcvdpsp, xvcvspdp. Signed-off-by: Tom Musta <tommusta@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
Tom Musta
Alexander Graf
parent
354a6decf1
commit
ed8ac5686a
|
|
@ -2384,3 +2384,49 @@ VSX_CMP(xvcmpgtdp, 2, float64, f64, lt, 1)
|
|||
VSX_CMP(xvcmpeqsp, 4, float32, f32, eq, 0)
|
||||
VSX_CMP(xvcmpgesp, 4, float32, f32, le, 1)
|
||||
VSX_CMP(xvcmpgtsp, 4, float32, f32, lt, 1)
|
||||
|
||||
#if defined(HOST_WORDS_BIGENDIAN)
|
||||
#define JOFFSET 0
|
||||
#else
|
||||
#define JOFFSET 1
|
||||
#endif
|
||||
|
||||
/* VSX_CVT_FP_TO_FP - VSX floating point/floating point conversion
|
||||
* op - instruction mnemonic
|
||||
* nels - number of elements (1, 2 or 4)
|
||||
* stp - source type (float32 or float64)
|
||||
* ttp - target type (float32 or float64)
|
||||
* sfld - source vsr_t field
|
||||
* tfld - target vsr_t field (f32 or f64)
|
||||
* sfprf - set FPRF
|
||||
*/
|
||||
#define VSX_CVT_FP_TO_FP(op, nels, stp, ttp, sfld, tfld, sfprf) \
|
||||
void helper_##op(CPUPPCState *env, uint32_t opcode) \
|
||||
{ \
|
||||
ppc_vsr_t xt, xb; \
|
||||
int i; \
|
||||
\
|
||||
getVSR(xB(opcode), &xb, env); \
|
||||
getVSR(xT(opcode), &xt, env); \
|
||||
\
|
||||
for (i = 0; i < nels; i++) { \
|
||||
int j = 2*i + JOFFSET; \
|
||||
xt.tfld = stp##_to_##ttp(xb.sfld, &env->fp_status); \
|
||||
if (unlikely(stp##_is_signaling_nan(xb.sfld))) { \
|
||||
fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 0); \
|
||||
xt.tfld = ttp##_snan_to_qnan(xt.tfld); \
|
||||
} \
|
||||
if (sfprf) { \
|
||||
helper_compute_fprf(env, ttp##_to_float64(xt.tfld, \
|
||||
&env->fp_status), sfprf); \
|
||||
} \
|
||||
} \
|
||||
\
|
||||
putVSR(xT(opcode), &xt, env); \
|
||||
helper_float_check_status(env); \
|
||||
}
|
||||
|
||||
VSX_CVT_FP_TO_FP(xscvdpsp, 1, float64, float32, f64[i], f32[j], 1)
|
||||
VSX_CVT_FP_TO_FP(xscvspdp, 1, float32, float64, f32[j], f64[i], 1)
|
||||
VSX_CVT_FP_TO_FP(xvcvdpsp, 2, float64, float32, f64[i], f32[j], 0)
|
||||
VSX_CVT_FP_TO_FP(xvcvspdp, 2, float32, float64, f32[j], f64[i], 0)
|
||||
|
|
|
|||
|
|
@ -272,6 +272,8 @@ DEF_HELPER_2(xscmpodp, void, env, i32)
|
|||
DEF_HELPER_2(xscmpudp, void, env, i32)
|
||||
DEF_HELPER_2(xsmaxdp, void, env, i32)
|
||||
DEF_HELPER_2(xsmindp, void, env, i32)
|
||||
DEF_HELPER_2(xscvdpsp, void, env, i32)
|
||||
DEF_HELPER_2(xscvspdp, void, env, i32)
|
||||
|
||||
DEF_HELPER_2(xvadddp, void, env, i32)
|
||||
DEF_HELPER_2(xvsubdp, void, env, i32)
|
||||
|
|
@ -295,6 +297,7 @@ DEF_HELPER_2(xvmindp, void, env, i32)
|
|||
DEF_HELPER_2(xvcmpeqdp, void, env, i32)
|
||||
DEF_HELPER_2(xvcmpgedp, void, env, i32)
|
||||
DEF_HELPER_2(xvcmpgtdp, void, env, i32)
|
||||
DEF_HELPER_2(xvcvdpsp, void, env, i32)
|
||||
|
||||
DEF_HELPER_2(xvaddsp, void, env, i32)
|
||||
DEF_HELPER_2(xvsubsp, void, env, i32)
|
||||
|
|
@ -318,6 +321,7 @@ DEF_HELPER_2(xvminsp, void, env, i32)
|
|||
DEF_HELPER_2(xvcmpeqsp, void, env, i32)
|
||||
DEF_HELPER_2(xvcmpgesp, void, env, i32)
|
||||
DEF_HELPER_2(xvcmpgtsp, void, env, i32)
|
||||
DEF_HELPER_2(xvcvspdp, void, env, i32)
|
||||
|
||||
DEF_HELPER_2(efscfsi, i32, env, i32)
|
||||
DEF_HELPER_2(efscfui, i32, env, i32)
|
||||
|
|
|
|||
|
|
@ -7325,6 +7325,8 @@ GEN_VSX_HELPER_2(xscmpodp, 0x0C, 0x05, 0, PPC2_VSX)
|
|||
GEN_VSX_HELPER_2(xscmpudp, 0x0C, 0x04, 0, PPC2_VSX)
|
||||
GEN_VSX_HELPER_2(xsmaxdp, 0x00, 0x14, 0, PPC2_VSX)
|
||||
GEN_VSX_HELPER_2(xsmindp, 0x00, 0x15, 0, PPC2_VSX)
|
||||
GEN_VSX_HELPER_2(xscvdpsp, 0x12, 0x10, 0, PPC2_VSX)
|
||||
GEN_VSX_HELPER_2(xscvspdp, 0x12, 0x14, 0, PPC2_VSX)
|
||||
|
||||
GEN_VSX_HELPER_2(xvadddp, 0x00, 0x0C, 0, PPC2_VSX)
|
||||
GEN_VSX_HELPER_2(xvsubdp, 0x00, 0x0D, 0, PPC2_VSX)
|
||||
|
|
@ -7348,6 +7350,7 @@ GEN_VSX_HELPER_2(xvmindp, 0x00, 0x1D, 0, PPC2_VSX)
|
|||
GEN_VSX_HELPER_2(xvcmpeqdp, 0x0C, 0x0C, 0, PPC2_VSX)
|
||||
GEN_VSX_HELPER_2(xvcmpgtdp, 0x0C, 0x0D, 0, PPC2_VSX)
|
||||
GEN_VSX_HELPER_2(xvcmpgedp, 0x0C, 0x0E, 0, PPC2_VSX)
|
||||
GEN_VSX_HELPER_2(xvcvdpsp, 0x12, 0x18, 0, PPC2_VSX)
|
||||
|
||||
GEN_VSX_HELPER_2(xvaddsp, 0x00, 0x08, 0, PPC2_VSX)
|
||||
GEN_VSX_HELPER_2(xvsubsp, 0x00, 0x09, 0, PPC2_VSX)
|
||||
|
|
@ -7371,6 +7374,7 @@ GEN_VSX_HELPER_2(xvminsp, 0x00, 0x19, 0, PPC2_VSX)
|
|||
GEN_VSX_HELPER_2(xvcmpeqsp, 0x0C, 0x08, 0, PPC2_VSX)
|
||||
GEN_VSX_HELPER_2(xvcmpgtsp, 0x0C, 0x09, 0, PPC2_VSX)
|
||||
GEN_VSX_HELPER_2(xvcmpgesp, 0x0C, 0x0A, 0, PPC2_VSX)
|
||||
GEN_VSX_HELPER_2(xvcvspdp, 0x12, 0x1C, 0, PPC2_VSX)
|
||||
|
||||
#define VSX_LOGICAL(name, tcg_op) \
|
||||
static void glue(gen_, name)(DisasContext * ctx) \
|
||||
|
|
@ -10085,6 +10089,8 @@ GEN_XX2FORM(xscmpodp, 0x0C, 0x05, PPC2_VSX),
|
|||
GEN_XX2FORM(xscmpudp, 0x0C, 0x04, PPC2_VSX),
|
||||
GEN_XX3FORM(xsmaxdp, 0x00, 0x14, PPC2_VSX),
|
||||
GEN_XX3FORM(xsmindp, 0x00, 0x15, PPC2_VSX),
|
||||
GEN_XX2FORM(xscvdpsp, 0x12, 0x10, PPC2_VSX),
|
||||
GEN_XX2FORM(xscvspdp, 0x12, 0x14, PPC2_VSX),
|
||||
|
||||
GEN_XX3FORM(xvadddp, 0x00, 0x0C, PPC2_VSX),
|
||||
GEN_XX3FORM(xvsubdp, 0x00, 0x0D, PPC2_VSX),
|
||||
|
|
@ -10108,6 +10114,7 @@ GEN_XX3FORM(xvmindp, 0x00, 0x1D, PPC2_VSX),
|
|||
GEN_XX3_RC_FORM(xvcmpeqdp, 0x0C, 0x0C, PPC2_VSX),
|
||||
GEN_XX3_RC_FORM(xvcmpgtdp, 0x0C, 0x0D, PPC2_VSX),
|
||||
GEN_XX3_RC_FORM(xvcmpgedp, 0x0C, 0x0E, PPC2_VSX),
|
||||
GEN_XX2FORM(xvcvdpsp, 0x12, 0x18, PPC2_VSX),
|
||||
|
||||
GEN_XX3FORM(xvaddsp, 0x00, 0x08, PPC2_VSX),
|
||||
GEN_XX3FORM(xvsubsp, 0x00, 0x09, PPC2_VSX),
|
||||
|
|
@ -10131,6 +10138,7 @@ GEN_XX3FORM(xvminsp, 0x00, 0x19, PPC2_VSX),
|
|||
GEN_XX3_RC_FORM(xvcmpeqsp, 0x0C, 0x08, PPC2_VSX),
|
||||
GEN_XX3_RC_FORM(xvcmpgtsp, 0x0C, 0x09, PPC2_VSX),
|
||||
GEN_XX3_RC_FORM(xvcmpgesp, 0x0C, 0x0A, PPC2_VSX),
|
||||
GEN_XX2FORM(xvcvspdp, 0x12, 0x1C, PPC2_VSX),
|
||||
|
||||
#undef VSX_LOGICAL
|
||||
#define VSX_LOGICAL(name, opc2, opc3, fl2) \
|
||||
|
|
|
|||
Loading…
Reference in New Issue