fix "Missing break in switch" coverity reports
Many of these are marked as "intentional/fix required" because they just need adding a fall through comment. This is exactly what this patch does, except for target/mips/translate.c where it is easier to duplicate the code, and hw/audio/sb16.c where I consulted the DOSBox sources and decide to just remove the LOG_UNIMP before the fallthrough. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -1623,6 +1623,7 @@ print_insn_arg (const char *d,
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case 'X':
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place = '8';
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/* fall through */
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case 'Y':
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case 'Z':
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case 'W':
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@ -409,7 +409,7 @@ static uint64_t pxa2xx_mm_read(void *opaque, hwaddr addr,
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case MDCNFG ... SA1110:
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if ((addr & 3) == 0)
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return s->mm_regs[addr >> 2];
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/* fall through */
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default:
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printf("%s: Bad register " REG_FMT "\n", __func__, addr);
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break;
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@ -305,6 +305,7 @@ static void cs_reset_voices (CSState *s, uint32_t val)
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case 6:
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as.endianness = 1;
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/* fall through */
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case 2:
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as.fmt = AUD_FMT_S16;
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s->shift = as.nchannels;
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@ -261,6 +261,7 @@ void gus_write(GUSEmuState * state, int port, int size, unsigned int data)
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GUSregb(IRQStatReg2x6) = 0x10;
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GUS_irqrequest(state, state->gusirq, 1);
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}
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/* fall through */
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case 0x20D: /* SB2xCd no IRQ */
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GUSregb(SB2xCd) = (uint8_t) data;
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break;
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@ -741,10 +741,15 @@ static void complete (SB16State *s)
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ldebug ("set time const %d\n", s->time_const);
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break;
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case 0x42: /* FT2 sets output freq with this, go figure */
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qemu_log_mask(LOG_UNIMP, "cmd 0x42 might not do what it think it"
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" should\n");
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case 0x41:
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case 0x42:
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/*
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* 0x41 is documented as setting the output sample rate,
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* and 0x42 the input sample rate, but in fact SB16 hardware
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* seems to have only a single sample rate under the hood,
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* and FT2 sets output freq with this (go figure). Compare:
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* http://homepages.cae.wisc.edu/~brodskye/sb16doc/sb16doc.html#SamplingRate
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*/
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s->freq = dsp_get_hilo (s);
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ldebug ("set freq %d\n", s->freq);
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break;
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@ -232,6 +232,7 @@ static void cg3_reg_write(void *opaque, hwaddr addr, uint64_t val,
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s->b[s->dac_index] = regval;
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/* Index autoincrement */
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s->dac_index = (s->dac_index + 1) & 0xff;
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/* fall through */
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default:
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s->dac_state = 0;
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break;
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@ -1426,7 +1426,8 @@ static void cirrus_vga_write_sr(CirrusVGAState * s, uint32_t val)
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s->vga.hw_cursor_y = (val << 3) | (s->vga.sr_index >> 5);
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break;
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case 0x07: // Extended Sequencer Mode
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cirrus_update_memory_access(s);
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cirrus_update_memory_access(s);
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/* fall through */
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case 0x08: // EEPROM Control
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case 0x09: // Scratch Register 0
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case 0x0a: // Scratch Register 1
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@ -74,6 +74,7 @@ static uint32_t sh_timer_read(void *opaque, hwaddr offset)
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case OFFSET_TCPR:
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if (s->feat & TIMER_FEAT_CAPT)
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return s->tcpr;
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/* fall through */
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default:
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hw_error("sh_timer_read: Bad offset %x\n", (int)offset);
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return 0;
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@ -12331,6 +12331,7 @@ int arm_rmode_to_sf(int rmode)
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/* FIXME: add support for TIEAWAY and ODD */
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qemu_log_mask(LOG_UNIMP, "arm: unimplemented rounding mode: %d\n",
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rmode);
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/* fall through for now */
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case FPROUNDING_TIEEVEN:
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default:
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rmode = float_round_nearest_even;
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@ -4689,6 +4689,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
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case 0x82:
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if (CODE64(s))
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goto illegal_op;
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/* fall through */
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case 0x80: /* GRP1 */
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case 0x81:
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case 0x83:
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@ -8292,6 +8293,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
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case 0x10e ... 0x10f:
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/* 3DNow! instructions, ignore prefixes */
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s->prefix &= ~(PREFIX_REPZ | PREFIX_REPNZ | PREFIX_DATA);
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/* fall through */
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case 0x110 ... 0x117:
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case 0x128 ... 0x12f:
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case 0x138 ... 0x13a:
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