target/arm: Introduce helper_exception_with_syndrome
With the helper we can use exception_target_el at runtime, instead of default_exception_el at translate time. While we're at it, remove the DisasContext parameter from gen_exception, as it is no longer used. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220609202901.1177572-20-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -45,6 +45,7 @@ DEF_HELPER_FLAGS_2(usad8, TCG_CALL_NO_RWG_SE, i32, i32, i32)
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DEF_HELPER_FLAGS_3(sel_flags, TCG_CALL_NO_RWG_SE,
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i32, i32, i32, i32)
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DEF_HELPER_2(exception_internal, noreturn, env, i32)
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DEF_HELPER_3(exception_with_syndrome, noreturn, env, i32, i32)
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DEF_HELPER_4(exception_with_syndrome_el, noreturn, env, i32, i32, i32)
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DEF_HELPER_2(exception_bkpt_insn, noreturn, env, i32)
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DEF_HELPER_2(exception_swstep, noreturn, env, i32)
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@ -399,6 +399,16 @@ void HELPER(exception_with_syndrome_el)(CPUARMState *env, uint32_t excp,
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raise_exception(env, excp, syndrome, target_el);
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}
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/*
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* Raise an exception with the specified syndrome register value
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* to the default target el.
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*/
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void HELPER(exception_with_syndrome)(CPUARMState *env, uint32_t excp,
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uint32_t syndrome)
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{
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raise_exception(env, excp, syndrome, exception_target_el(env));
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}
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uint32_t HELPER(cpsr_read)(CPUARMState *env)
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{
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return cpsr_read(env) & ~CPSR_EXEC;
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@ -1097,9 +1097,10 @@ static void gen_exception_el(int excp, uint32_t syndrome, uint32_t target_el)
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gen_exception_el_v(excp, syndrome, tcg_constant_i32(target_el));
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}
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static void gen_exception(DisasContext *s, int excp, uint32_t syndrome)
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static void gen_exception(int excp, uint32_t syndrome)
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{
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gen_exception_el(excp, syndrome, default_exception_el(s));
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gen_helper_exception_with_syndrome(cpu_env, tcg_constant_i32(excp),
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tcg_constant_i32(syndrome));
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}
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static void gen_exception_insn_el_v(DisasContext *s, uint64_t pc, int excp,
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@ -1123,7 +1124,14 @@ void gen_exception_insn_el(DisasContext *s, uint64_t pc, int excp,
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void gen_exception_insn(DisasContext *s, uint64_t pc, int excp, uint32_t syn)
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{
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gen_exception_insn_el(s, pc, excp, syn, default_exception_el(s));
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if (s->aarch64) {
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gen_a64_set_pc_im(pc);
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} else {
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gen_set_condexec(s);
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gen_set_pc_im(s, pc);
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}
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gen_exception(excp, syn);
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s->base.is_jmp = DISAS_NORETURN;
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}
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static void gen_exception_bkpt_insn(DisasContext *s, uint32_t syn)
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@ -9766,7 +9774,7 @@ static void arm_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
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switch (dc->base.is_jmp) {
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case DISAS_SWI:
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gen_ss_advance(dc);
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gen_exception(dc, EXCP_SWI, syn_aa32_svc(dc->svc_imm, dc->thumb));
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gen_exception(EXCP_SWI, syn_aa32_svc(dc->svc_imm, dc->thumb));
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break;
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case DISAS_HVC:
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gen_ss_advance(dc);
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@ -9835,7 +9843,7 @@ static void arm_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
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gen_helper_yield(cpu_env);
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break;
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case DISAS_SWI:
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gen_exception(dc, EXCP_SWI, syn_aa32_svc(dc->svc_imm, dc->thumb));
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gen_exception(EXCP_SWI, syn_aa32_svc(dc->svc_imm, dc->thumb));
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break;
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case DISAS_HVC:
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gen_exception_el(EXCP_HVC, syn_aa32_hvc(dc->svc_imm), 2);
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