Add rtc reset function.
On reset: Periodic Interrupt Enable (PIE) bit is cleared to zero Alarm Interrupt Enable (AIE) bit is cleared to zero Update ended Interrupt Flag (UF) bit is cleared to zero Interrupt Request status Flag (IRQF) bit is cleared to zero Periodic Interrupt Flag (PF) bit is cleared to zero Alarm Interrupt Flag (AF) bit is cleared to zero Square Wave output Enable (SQWE) zero Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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@ -568,6 +568,22 @@ static int rtc_load_td(QEMUFile *f, void *opaque, int version_id)
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}
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#endif
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static void rtc_reset(void *opaque)
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{
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RTCState *s = opaque;
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/* clear PIE,AIE,SQWE on reset */
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s->cmos_data[RTC_REG_B] &= ~((1<<6) | (1<<5) | (1<<3));
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/* clear UF,IRQF,PF,AF on reset */
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s->cmos_data[RTC_REG_C] &= ~((1<<4) | (1<<7) | (1<<6) | (1<<5));
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#ifdef TARGET_I386
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if (rtc_td_hack)
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s->irq_coalesced = 0;
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#endif
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}
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RTCState *rtc_init_sqw(int base, qemu_irq irq, qemu_irq sqw_irq, int base_year)
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{
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RTCState *s;
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@ -606,6 +622,8 @@ RTCState *rtc_init_sqw(int base, qemu_irq irq, qemu_irq sqw_irq, int base_year)
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if (rtc_td_hack)
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register_savevm("mc146818rtc-td", base, 1, rtc_save_td, rtc_load_td, s);
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#endif
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qemu_register_reset(rtc_reset, 0, s);
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return s;
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}
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@ -721,5 +739,6 @@ RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
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if (rtc_td_hack)
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register_savevm("mc146818rtc-td", base, 1, rtc_save_td, rtc_load_td, s);
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#endif
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qemu_register_reset(rtc_reset, 0, s);
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return s;
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}
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