accel/tcg: Restrict TCGCPUOps::tlb_fill() to sysemu
We have replaced tlb_fill with record_sigsegv for user mode. Move the declaration to restrict it to system emulation. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -35,18 +35,6 @@ struct TCGCPUOps {
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void (*cpu_exec_enter)(CPUState *cpu);
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/** @cpu_exec_exit: Callback for cpu_exec cleanup */
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void (*cpu_exec_exit)(CPUState *cpu);
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/**
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* @tlb_fill: Handle a softmmu tlb miss or user-only address fault
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*
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* For system mode, if the access is valid, call tlb_set_page
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* and return true; if the access is invalid, and probe is
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* true, return false; otherwise raise an exception and do
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* not return. For user-only mode, always raise an exception
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* and do not return.
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*/
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bool (*tlb_fill)(CPUState *cpu, vaddr address, int size,
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MMUAccessType access_type, int mmu_idx,
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bool probe, uintptr_t retaddr);
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/** @debug_excp_handler: Callback for handling debug exceptions */
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void (*debug_excp_handler)(CPUState *cpu);
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@ -68,6 +56,16 @@ struct TCGCPUOps {
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#ifdef CONFIG_SOFTMMU
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/** @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec */
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bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request);
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/**
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* @tlb_fill: Handle a softmmu tlb miss
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*
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* If the access is valid, call tlb_set_page and return true;
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* if the access is invalid and probe is true, return false;
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* otherwise raise an exception and do not return.
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*/
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bool (*tlb_fill)(CPUState *cpu, vaddr address, int size,
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MMUAccessType access_type, int mmu_idx,
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bool probe, uintptr_t retaddr);
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/**
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* @do_transaction_failed: Callback for handling failed memory transactions
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* (ie bus faults or external aborts; not MMU faults)
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@ -697,9 +697,6 @@ void cpu_loop_exit_sigsegv(CPUState *cpu, target_ulong addr,
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if (tcg_ops->record_sigsegv) {
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tcg_ops->record_sigsegv(cpu, addr, access_type, maperr, ra);
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} else if (tcg_ops->tlb_fill) {
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tcg_ops->tlb_fill(cpu, addr, 0, access_type, MMU_USER_IDX, false, ra);
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g_assert_not_reached();
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}
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force_sig_fault(TARGET_SIGSEGV,
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