- linux-user:
. Don't use 16-bit UIDs with SPARC V9 . Pick MIPS3 CPU by default to run NaN2008 ELF binaries - HW: . Fix invalid GT64120 north bridge endianness register swap . Prevent NULL pointer dereference by SMBus devices - Buildsys: . Fix compiling with liblzfse on Darwin -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmQli+8ACgkQ4+MsLN6t wN5GJw/8CqzhxQgp11u2ArQlz/zsXJd4d6goIAIefJK1H80FXhqblz3ZBICci0Mu vA9CCayQ72r2NYR71QNvK6WWAJRnWbwFYH5arbvFRlCtDKV/n/DSSqsytY0Pd9eZ YlGJQ8tjO2PNa+K6J1ElUDRDk+xPnWlocewrb/Kxjhe6zk2RXQ9AZiGDj3+4vXlj rbPe5LpWS9zyl3TwF11wJSZOx2yX+D8JgR2klAgniZsk4NFJq1sluIFutFuU3JgQ N5m8bR3yfe8ImKYXyu3mKSsAuoyLmM2RKrFzWLjOmgYn2JL4Glj0QWWznNWolNSQ jJBHszcEUtwrr3ls5SiLf+I+fXbxyicqREQsvrzyy7UbaJTv0y8S+Ofg2dcqGCTD qN89MZDHbxko+J7RnNUtNfb5glrqAvtwhx6B3T+qnyJQ/ExtGqy69tKBCAYKbCWV YnMBVg6oP2TgcX34mC9z6iR38W2GBPfCyYXNSD2FgRRD1Gy8jCkR/RQOwaF2YNY3 q5AInqW1I0LuLhrPOg1tRUu9PeGlEqcHs4OmqKSgTgE9JchgWCJrCtgxdgaAXkMK LKZbpnyNni70H5hkIGXIxnw0mUUFIdWJQNMHZeTxfh99x7kuDfxhnaxS2oCgJhdi k7RhVQybBFrcwL/cxaywKRDc5oj4aS46qYm08nP8JQIIjIbszRA= =SOYX -----END PGP SIGNATURE----- Merge tag 'misc-fixes-20230330' of https://github.com/philmd/qemu into staging - linux-user: . Don't use 16-bit UIDs with SPARC V9 . Pick MIPS3 CPU by default to run NaN2008 ELF binaries - HW: . Fix invalid GT64120 north bridge endianness register swap . Prevent NULL pointer dereference by SMBus devices - Buildsys: . Fix compiling with liblzfse on Darwin # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmQli+8ACgkQ4+MsLN6t # wN5GJw/8CqzhxQgp11u2ArQlz/zsXJd4d6goIAIefJK1H80FXhqblz3ZBICci0Mu # vA9CCayQ72r2NYR71QNvK6WWAJRnWbwFYH5arbvFRlCtDKV/n/DSSqsytY0Pd9eZ # YlGJQ8tjO2PNa+K6J1ElUDRDk+xPnWlocewrb/Kxjhe6zk2RXQ9AZiGDj3+4vXlj # rbPe5LpWS9zyl3TwF11wJSZOx2yX+D8JgR2klAgniZsk4NFJq1sluIFutFuU3JgQ # N5m8bR3yfe8ImKYXyu3mKSsAuoyLmM2RKrFzWLjOmgYn2JL4Glj0QWWznNWolNSQ # jJBHszcEUtwrr3ls5SiLf+I+fXbxyicqREQsvrzyy7UbaJTv0y8S+Ofg2dcqGCTD # qN89MZDHbxko+J7RnNUtNfb5glrqAvtwhx6B3T+qnyJQ/ExtGqy69tKBCAYKbCWV # YnMBVg6oP2TgcX34mC9z6iR38W2GBPfCyYXNSD2FgRRD1Gy8jCkR/RQOwaF2YNY3 # q5AInqW1I0LuLhrPOg1tRUu9PeGlEqcHs4OmqKSgTgE9JchgWCJrCtgxdgaAXkMK # LKZbpnyNni70H5hkIGXIxnw0mUUFIdWJQNMHZeTxfh99x7kuDfxhnaxS2oCgJhdi # k7RhVQybBFrcwL/cxaywKRDc5oj4aS46qYm08nP8JQIIjIbszRA= # =SOYX # -----END PGP SIGNATURE----- # gpg: Signature made Thu 30 Mar 2023 14:17:35 BST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'misc-fixes-20230330' of https://github.com/philmd/qemu: block/dmg: Ignore C99 prototype declaration mismatch from <lzfse.h> hw/i2c: pmbus: block uninitialised string reads tests/avocado: Enable TuxRun/mips64 (big-endian) test hw/mips/gt64xxx_pci: Don't endian-swap GT_PCI0_CFGADDR linux-user/mips: Use P5600 as default CPU to run NaN2008 ELF binaries linux-user/sparc: Don't use 16-bit UIDs on SPARC V9 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
commit
efcd0ec14b
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@ -23,7 +23,12 @@
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*/
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#include "qemu/osdep.h"
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#include "dmg.h"
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/* Work around a -Wstrict-prototypes warning in LZFSE headers */
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#pragma GCC diagnostic push
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#pragma GCC diagnostic ignored "-Wstrict-prototypes"
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#include <lzfse.h>
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#pragma GCC diagnostic pop
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static int dmg_uncompress_lzfse_do(char *next_in, unsigned int avail_in,
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char *next_out, unsigned int avail_out)
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@ -94,6 +94,13 @@ void pmbus_send64(PMBusDevice *pmdev, uint64_t data)
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void pmbus_send_string(PMBusDevice *pmdev, const char *data)
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{
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if (!data) {
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qemu_log_mask(LOG_GUEST_ERROR,
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"%s: %s: uninitialised read from 0x%02x\n",
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__func__, DEVICE(pmdev)->canonical_path, pmdev->code);
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return;
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}
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size_t len = strlen(data);
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g_assert(len > 0);
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g_assert(len + pmdev->out_buf_len < SMBUS_DATA_MAX_LEN);
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@ -321,9 +321,6 @@ static void gt64120_isd_mapping(GT64120State *s)
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static void gt64120_update_pci_cfgdata_mapping(GT64120State *s)
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{
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/* Indexed on MByteSwap bit, see Table 158: PCI_0 Command, Offset: 0xc00 */
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static const MemoryRegionOps *pci_host_conf_ops[] = {
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&pci_host_conf_be_ops, &pci_host_conf_le_ops
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};
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static const MemoryRegionOps *pci_host_data_ops[] = {
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&pci_host_data_be_ops, &pci_host_data_le_ops
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};
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@ -339,15 +336,6 @@ static void gt64120_update_pci_cfgdata_mapping(GT64120State *s)
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* - Table 16: 32-bit PCI Transaction Endianess
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* - Table 158: PCI_0 Command, Offset: 0xc00
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*/
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if (memory_region_is_mapped(&phb->conf_mem)) {
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memory_region_del_subregion(&s->ISD_mem, &phb->conf_mem);
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object_unparent(OBJECT(&phb->conf_mem));
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}
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memory_region_init_io(&phb->conf_mem, OBJECT(phb),
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pci_host_conf_ops[s->regs[GT_PCI0_CMD] & 1],
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s, "pci-conf-idx", 4);
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memory_region_add_subregion_overlap(&s->ISD_mem, GT_PCI0_CFGADDR << 2,
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&phb->conf_mem, 1);
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if (memory_region_is_mapped(&phb->data_mem)) {
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memory_region_del_subregion(&s->ISD_mem, &phb->data_mem);
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PCI_DEVFN(18, 0), TYPE_PCI_BUS);
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pci_create_simple(phb->bus, PCI_DEVFN(0, 0), "gt64120_pci");
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memory_region_init_io(&phb->conf_mem, OBJECT(phb),
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&pci_host_conf_le_ops,
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s, "pci-conf-idx", 4);
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memory_region_add_subregion_overlap(&s->ISD_mem, GT_PCI0_CFGADDR << 2,
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&phb->conf_mem, 1);
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/*
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* The whole address space decoded by the GT-64120A doesn't generate
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@ -15,6 +15,9 @@ static inline const char *cpu_get_model(uint32_t eflags)
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if ((eflags & EF_MIPS_MACH) == EF_MIPS_MACH_5900) {
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return "R5900";
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}
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if (eflags & EF_MIPS_NAN2008) {
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return "P5600";
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}
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return "24Kf";
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}
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#endif
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@ -61,7 +61,7 @@
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#if (defined(TARGET_I386) && defined(TARGET_ABI32)) \
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|| (defined(TARGET_ARM) && defined(TARGET_ABI32)) \
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|| defined(TARGET_SPARC) \
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|| (defined(TARGET_SPARC) && defined(TARGET_ABI32)) \
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|| defined(TARGET_M68K) || defined(TARGET_SH4) || defined(TARGET_CRIS)
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/* 16 bit uid wrappers emulation */
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#define USE_UID16
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@ -270,7 +270,6 @@ class TuxRunBaselineTest(QemuSystemTest):
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"""
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self.common_tuxrun(drive="driver=ide-hd,bus=ide.0,unit=0")
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@skip("QEMU currently broken") # regression against stable QEMU
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def test_mips64(self):
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"""
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:avocado: tags=arch:mips64
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