MIPS patches queue

- Fix CP0 cycle counter timing
 - Fix VMState of gt64120 IRQs
 - Long due PIIX4 QOM cleanups
 - ISA IRQ QOM'ification / cleanups
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Merge remote-tracking branch 'remotes/philmd/tags/mips-20220308' into staging

MIPS patches queue

- Fix CP0 cycle counter timing
- Fix VMState of gt64120 IRQs
- Long due PIIX4 QOM cleanups
- ISA IRQ QOM'ification / cleanups

# gpg: Signature made Tue 08 Mar 2022 18:39:42 GMT
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* remotes/philmd/tags/mips-20220308:
  tests/avocado/linux_ssh_mips_malta.py: add missing accel (tcg) tag
  hw/isa: Inline and remove one-line isa_init_irq()
  hw/isa: Drop unused attributes from ISADevice
  hw/isa/isa-bus: Remove isabus_dev_print()
  hw/input/pckbd: QOM'ify IRQ numbers
  hw/rtc/m48t59-isa: QOM'ify IRQ number
  hw/rtc/mc146818rtc: QOM'ify IRQ number
  hw/mips/gt64xxx_pci: Resolve gt64120_register()
  hw/isa/piix4: Replace some magic IRQ constants
  hw/isa/piix4: Resolve global instance variable
  hw/isa/piix4: Pass PIIX4State as opaque parameter for piix4_set_irq()
  hw/isa/piix4: Resolve redundant i8259[] attribute
  malta: Move PCI interrupt handling from gt64xxx_pci to piix4
  hw/mips/gt64xxx_pci: Fix PCI IRQ levels to be preserved during migration
  target/mips: Remove duplicated MIPSCPU::cp0_count_rate
  target/mips: Fix cycle counter timing calculations

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2022-03-09 09:13:39 +00:00
commit f14ad81eed
27 changed files with 127 additions and 190 deletions

View File

@ -677,7 +677,7 @@ static void cs4231a_realizefn (DeviceState *dev, Error **errp)
return;
}
isa_init_irq(d, &s->pic, s->irq);
s->pic = isa_get_irq(d, s->irq);
k = ISADMA_GET_CLASS(s->isa_dma);
k->register_channel(s->isa_dma, s->dma, cs_dma_read, s);

View File

@ -282,7 +282,7 @@ static void gus_realizefn (DeviceState *dev, Error **errp)
s->emu.himemaddr = s->himem;
s->emu.gusdatapos = s->emu.himemaddr + 1024 * 1024 + 32;
s->emu.opaque = s;
isa_init_irq (d, &s->pic, s->emu.gusirq);
s->pic = isa_get_irq(d, s->emu.gusirq);
AUD_set_active_out (s->voice, 1);
}

View File

@ -1408,7 +1408,7 @@ static void sb16_realizefn (DeviceState *dev, Error **errp)
return;
}
isa_init_irq (isadev, &s->pic, s->irq);
s->pic = isa_get_irq(isadev, s->irq);
s->mixer_regs[0x80] = magic_of_irq (s->irq);
s->mixer_regs[0x81] = (1 << s->dma) | (1 << s->hdma);

View File

@ -94,7 +94,7 @@ static void isabus_fdc_realize(DeviceState *dev, Error **errp)
isa->iobase, fdc_portio_list, fdctrl,
"fdc");
isa_init_irq(isadev, &fdctrl->irq, isa->irq);
fdctrl->irq = isa_get_irq(isadev, isa->irq);
fdctrl->dma_chann = isa->dma;
if (fdctrl->dma_chann != -1) {
IsaDmaClass *k;

View File

@ -553,7 +553,7 @@ static void parallel_isa_realizefn(DeviceState *dev, Error **errp)
index++;
base = isa->iobase;
isa_init_irq(isadev, &s->irq, isa->isairq);
s->irq = isa_get_irq(isadev, isa->isairq);
qemu_register_reset(parallel_reset, s);
qemu_chr_fe_set_handlers(&s->chr, parallel_can_receive, NULL,

View File

@ -75,7 +75,7 @@ static void serial_isa_realizefn(DeviceState *dev, Error **errp)
}
index++;
isa_init_irq(isadev, &s->irq, isa->isairq);
s->irq = isa_get_irq(isadev, isa->isairq);
qdev_realize(DEVICE(s), NULL, errp);
qdev_set_legacy_instance_id(dev, isa->iobase, 3);

View File

@ -75,7 +75,7 @@ static void isa_ide_realizefn(DeviceState *dev, Error **errp)
ide_bus_init(&s->bus, sizeof(s->bus), dev, 0, 2);
ide_init_ioport(&s->bus, isadev, s->iobase, s->iobase2);
isa_init_irq(isadev, &s->irq, s->isairq);
s->irq = isa_get_irq(isadev, s->isairq);
ide_init2(&s->bus, s->irq);
vmstate_register(VMSTATE_IF(dev), 0, &vmstate_ide_isa, s);
ide_register_restart_cb(&s->bus);

View File

@ -26,6 +26,7 @@
#include "qemu/error-report.h"
#include "qemu/log.h"
#include "qemu/timer.h"
#include "qapi/error.h"
#include "hw/isa/isa.h"
#include "migration/vmstate.h"
#include "hw/acpi/aml-build.h"
@ -671,6 +672,8 @@ struct ISAKBDState {
KBDState kbd;
bool kbd_throttle;
MemoryRegion io[2];
uint8_t kbd_irq;
uint8_t mouse_irq;
};
void i8042_isa_mouse_fake_event(ISAKBDState *isa)
@ -734,8 +737,20 @@ static void i8042_realizefn(DeviceState *dev, Error **errp)
ISAKBDState *isa_s = I8042(dev);
KBDState *s = &isa_s->kbd;
isa_init_irq(isadev, &s->irq_kbd, 1);
isa_init_irq(isadev, &s->irq_mouse, 12);
if (isa_s->kbd_irq >= ISA_NUM_IRQS) {
error_setg(errp, "Maximum value for \"kbd-irq\" is: %u",
ISA_NUM_IRQS - 1);
return;
}
if (isa_s->mouse_irq >= ISA_NUM_IRQS) {
error_setg(errp, "Maximum value for \"mouse-irq\" is: %u",
ISA_NUM_IRQS - 1);
return;
}
s->irq_kbd = isa_get_irq(isadev, isa_s->kbd_irq);
s->irq_mouse = isa_get_irq(isadev, isa_s->mouse_irq);
isa_register_ioport(isadev, isa_s->io + 0, 0x60);
isa_register_ioport(isadev, isa_s->io + 1, 0x64);
@ -754,6 +769,7 @@ static void i8042_realizefn(DeviceState *dev, Error **errp)
static void i8042_build_aml(ISADevice *isadev, Aml *scope)
{
ISAKBDState *isa_s = I8042(isadev);
Aml *kbd;
Aml *mou;
Aml *crs;
@ -761,7 +777,7 @@ static void i8042_build_aml(ISADevice *isadev, Aml *scope)
crs = aml_resource_template();
aml_append(crs, aml_io(AML_DECODE16, 0x0060, 0x0060, 0x01, 0x01));
aml_append(crs, aml_io(AML_DECODE16, 0x0064, 0x0064, 0x01, 0x01));
aml_append(crs, aml_irq_no_flags(1));
aml_append(crs, aml_irq_no_flags(isa_s->kbd_irq));
kbd = aml_device("KBD");
aml_append(kbd, aml_name_decl("_HID", aml_eisaid("PNP0303")));
@ -769,7 +785,7 @@ static void i8042_build_aml(ISADevice *isadev, Aml *scope)
aml_append(kbd, aml_name_decl("_CRS", crs));
crs = aml_resource_template();
aml_append(crs, aml_irq_no_flags(12));
aml_append(crs, aml_irq_no_flags(isa_s->mouse_irq));
mou = aml_device("MOU");
aml_append(mou, aml_name_decl("_HID", aml_eisaid("PNP0F13")));
@ -783,6 +799,8 @@ static void i8042_build_aml(ISADevice *isadev, Aml *scope)
static Property i8042_properties[] = {
DEFINE_PROP_BOOL("extended-state", ISAKBDState, kbd.extended_state, true),
DEFINE_PROP_BOOL("kbd-throttle", ISAKBDState, kbd_throttle, false),
DEFINE_PROP_UINT8("kbd-irq", ISAKBDState, kbd_irq, 1),
DEFINE_PROP_UINT8("mouse-irq", ISAKBDState, mouse_irq, 12),
DEFINE_PROP_END_OF_LIST(),
};

View File

@ -92,7 +92,7 @@ static void isa_ipmi_bt_realize(DeviceState *dev, Error **errp)
}
if (iib->isairq > 0) {
isa_init_irq(isadev, &iib->irq, iib->isairq);
iib->irq = isa_get_irq(isadev, iib->isairq);
iib->bt.use_irq = 1;
iib->bt.raise_irq = isa_ipmi_bt_raise_irq;
iib->bt.lower_irq = isa_ipmi_bt_lower_irq;

View File

@ -91,7 +91,7 @@ static void ipmi_isa_realize(DeviceState *dev, Error **errp)
}
if (iik->isairq > 0) {
isa_init_irq(isadev, &iik->irq, iik->isairq);
iik->irq = isa_get_irq(isadev, iik->isairq);
iik->kcs.use_irq = 1;
iik->kcs.raise_irq = isa_ipmi_kcs_raise_irq;
iik->kcs.lower_irq = isa_ipmi_kcs_lower_irq;

View File

@ -21,21 +21,18 @@
#include "qemu/error-report.h"
#include "qemu/module.h"
#include "qapi/error.h"
#include "monitor/monitor.h"
#include "hw/sysbus.h"
#include "sysemu/sysemu.h"
#include "hw/isa/isa.h"
static ISABus *isabus;
static void isabus_dev_print(Monitor *mon, DeviceState *dev, int indent);
static char *isabus_get_fw_dev_path(DeviceState *dev);
static void isa_bus_class_init(ObjectClass *klass, void *data)
{
BusClass *k = BUS_CLASS(klass);
k->print_dev = isabus_dev_print;
k->get_fw_dev_path = isabus_get_fw_dev_path;
}
@ -88,19 +85,9 @@ qemu_irq isa_get_irq(ISADevice *dev, unsigned isairq)
return isabus->irqs[isairq];
}
void isa_init_irq(ISADevice *dev, qemu_irq *p, unsigned isairq)
{
assert(dev->nirqs < ARRAY_SIZE(dev->isairq));
assert(isairq < ISA_NUM_IRQS);
dev->isairq[dev->nirqs] = isairq;
*p = isa_get_irq(dev, isairq);
dev->nirqs++;
}
void isa_connect_gpio_out(ISADevice *isadev, int gpioirq, unsigned isairq)
{
qemu_irq irq;
isa_init_irq(isadev, &irq, isairq);
qemu_irq irq = isa_get_irq(isadev, isairq);
qdev_connect_gpio_out(DEVICE(isadev), gpioirq, irq);
}
@ -153,14 +140,6 @@ int isa_register_portio_list(ISADevice *dev,
return 0;
}
static void isa_device_init(Object *obj)
{
ISADevice *dev = ISA_DEVICE(obj);
dev->isairq[0] = -1;
dev->isairq[1] = -1;
}
ISADevice *isa_new(const char *name)
{
return ISA_DEVICE(qdev_new(name));
@ -222,19 +201,6 @@ void isa_build_aml(ISABus *bus, Aml *scope)
}
}
static void isabus_dev_print(Monitor *mon, DeviceState *dev, int indent)
{
ISADevice *d = ISA_DEVICE(dev);
if (d->isairq[1] != -1) {
monitor_printf(mon, "%*sisa irqs %d,%d\n", indent, "",
d->isairq[0], d->isairq[1]);
} else if (d->isairq[0] != -1) {
monitor_printf(mon, "%*sisa irq %d\n", indent, "",
d->isairq[0]);
}
}
static void isabus_bridge_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@ -260,7 +226,6 @@ static const TypeInfo isa_device_type_info = {
.name = TYPE_ISA_DEVICE,
.parent = TYPE_DEVICE,
.instance_size = sizeof(ISADevice),
.instance_init = isa_device_init,
.abstract = true,
.class_size = sizeof(ISADeviceClass),
.class_init = isa_device_class_init,

View File

@ -39,8 +39,6 @@
#include "sysemu/runstate.h"
#include "qom/object.h"
PCIDevice *piix4_dev;
struct PIIX4State {
PCIDevice dev;
qemu_irq cpu_intr;
@ -54,6 +52,27 @@ struct PIIX4State {
OBJECT_DECLARE_SIMPLE_TYPE(PIIX4State, PIIX4_PCI_DEVICE)
static void piix4_set_irq(void *opaque, int irq_num, int level)
{
int i, pic_irq, pic_level;
PIIX4State *s = opaque;
PCIBus *bus = pci_get_bus(&s->dev);
/* now we change the pic irq level according to the piix irq mappings */
/* XXX: optimize */
pic_irq = s->dev.config[PIIX_PIRQCA + irq_num];
if (pic_irq < ISA_NUM_IRQS) {
/* The pic level is the logical OR of all the PCI irqs mapped to it. */
pic_level = 0;
for (i = 0; i < PIIX_NUM_PIRQS; i++) {
if (pic_irq == s->dev.config[PIIX_PIRQCA + i]) {
pic_level |= pci_bus_get_irq_level(bus, i);
}
}
qemu_set_irq(s->isa[pic_irq], pic_level);
}
}
static void piix4_isa_reset(DeviceState *dev)
{
PIIX4State *d = PIIX4_PCI_DEVICE(dev);
@ -197,9 +216,7 @@ static void piix4_realize(PCIDevice *dev, Error **errp)
if (!qdev_realize(DEVICE(&s->rtc), BUS(isa_bus), errp)) {
return;
}
isa_init_irq(ISA_DEVICE(&s->rtc), &s->rtc.irq, RTC_ISA_IRQ);
piix4_dev = dev;
s->rtc.irq = isa_get_irq(ISA_DEVICE(&s->rtc), s->rtc.isairq);
}
static void piix4_init(Object *obj)
@ -248,8 +265,34 @@ static void piix4_register_types(void)
type_init(piix4_register_types)
static int pci_slot_get_pirq(PCIDevice *pci_dev, int irq_num)
{
int slot;
slot = PCI_SLOT(pci_dev->devfn);
switch (slot) {
/* PIIX4 USB */
case 10:
return 3;
/* AMD 79C973 Ethernet */
case 11:
return 1;
/* Crystal 4281 Sound */
case 12:
return 2;
/* PCI slot 1 to 4 */
case 18 ... 21:
return ((slot - 18) + irq_num) & 0x03;
/* Unknown device, don't do any translation */
default:
return irq_num;
}
}
DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus)
{
PIIX4State *s;
PCIDevice *pci;
DeviceState *dev;
int devfn = PCI_DEVFN(10, 0);
@ -257,6 +300,7 @@ DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus)
pci = pci_create_simple_multifunction(pci_bus, devfn, true,
TYPE_PIIX4_PCI_DEVICE);
dev = DEVICE(pci);
s = PIIX4_PCI_DEVICE(pci);
if (isa_bus) {
*isa_bus = ISA_BUS(qdev_get_child_bus(dev, "isa.0"));
}
@ -271,5 +315,7 @@ DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus)
NULL, 0, NULL);
}
pci_bus_irqs(pci_bus, piix4_set_irq, pci_slot_get_pirq, s, PIIX_NUM_PIRQS);
return dev;
}

View File

@ -26,10 +26,8 @@
#include "qapi/error.h"
#include "qemu/units.h"
#include "qemu/log.h"
#include "hw/mips/mips.h"
#include "hw/pci/pci.h"
#include "hw/pci/pci_host.h"
#include "hw/southbridge/piix.h"
#include "migration/vmstate.h"
#include "hw/intc/i8259.h"
#include "hw/irq.h"
@ -981,56 +979,6 @@ static const MemoryRegionOps isd_mem_ops = {
},
};
static int gt64120_pci_map_irq(PCIDevice *pci_dev, int irq_num)
{
int slot;
slot = PCI_SLOT(pci_dev->devfn);
switch (slot) {
/* PIIX4 USB */
case 10:
return 3;
/* AMD 79C973 Ethernet */
case 11:
return 1;
/* Crystal 4281 Sound */
case 12:
return 2;
/* PCI slot 1 to 4 */
case 18 ... 21:
return ((slot - 18) + irq_num) & 0x03;
/* Unknown device, don't do any translation */
default:
return irq_num;
}
}
static int pci_irq_levels[4];
static void gt64120_pci_set_irq(void *opaque, int irq_num, int level)
{
int i, pic_irq, pic_level;
qemu_irq *pic = opaque;
pci_irq_levels[irq_num] = level;
/* now we change the pic irq level according to the piix irq mappings */
/* XXX: optimize */
pic_irq = piix4_dev->config[PIIX_PIRQCA + irq_num];
if (pic_irq < 16) {
/* The pic level is the logical OR of all the PCI irqs mapped to it. */
pic_level = 0;
for (i = 0; i < 4; i++) {
if (pic_irq == piix4_dev->config[PIIX_PIRQCA + i]) {
pic_level |= pci_irq_levels[i];
}
}
qemu_set_irq(pic[pic_irq], pic_level);
}
}
static void gt64120_reset(DeviceState *dev)
{
GT64120State *s = GT64120_PCI_HOST_BRIDGE(dev);
@ -1202,32 +1150,18 @@ static void gt64120_reset(DeviceState *dev)
static void gt64120_realize(DeviceState *dev, Error **errp)
{
GT64120State *s = GT64120_PCI_HOST_BRIDGE(dev);
PCIHostState *phb = PCI_HOST_BRIDGE(dev);
memory_region_init_io(&s->ISD_mem, OBJECT(dev), &isd_mem_ops, s,
"gt64120-isd", 0x1000);
}
PCIBus *gt64120_register(qemu_irq *pic)
{
GT64120State *d;
PCIHostState *phb;
DeviceState *dev;
dev = qdev_new(TYPE_GT64120_PCI_HOST_BRIDGE);
d = GT64120_PCI_HOST_BRIDGE(dev);
phb = PCI_HOST_BRIDGE(dev);
memory_region_init(&d->pci0_mem, OBJECT(dev), "pci0-mem", 4 * GiB);
address_space_init(&d->pci0_mem_as, &d->pci0_mem, "pci0-mem");
phb->bus = pci_register_root_bus(dev, "pci",
gt64120_pci_set_irq, gt64120_pci_map_irq,
pic,
&d->pci0_mem,
get_system_io(),
PCI_DEVFN(18, 0), 4, TYPE_PCI_BUS);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
memory_region_init(&s->pci0_mem, OBJECT(dev), "pci0-mem", 4 * GiB);
address_space_init(&s->pci0_mem_as, &s->pci0_mem, "pci0-mem");
phb->bus = pci_root_bus_new(dev, "pci",
&s->pci0_mem,
get_system_io(),
PCI_DEVFN(18, 0), TYPE_PCI_BUS);
pci_create_simple(phb->bus, PCI_DEVFN(0, 0), "gt64120_pci");
return phb->bus;
}
static void gt64120_pci_realize(PCIDevice *d, Error **errp)

View File

@ -97,7 +97,6 @@ struct MaltaState {
Clock *cpuclk;
MIPSCPSState cps;
qemu_irq i8259[ISA_NUM_IRQS];
};
static struct _loaderparams {
@ -1391,7 +1390,8 @@ void mips_malta_init(MachineState *machine)
stl_p(memory_region_get_ram_ptr(bios_copy) + 0x10, 0x00000420);
/* Northbridge */
pci_bus = gt64120_register(s->i8259);
dev = sysbus_create_simple("gt64120", -1, NULL);
pci_bus = PCI_BUS(qdev_get_child_bus(dev, "pci"));
/*
* The whole address space decoded by the GT-64120A doesn't generate
* exception when accessing invalid memory. Create an empty slot to
@ -1404,9 +1404,6 @@ void mips_malta_init(MachineState *machine)
/* Interrupt controller */
qdev_connect_gpio_out_named(dev, "intr", 0, i8259_irq);
for (int i = 0; i < ISA_NUM_IRQS; i++) {
s->i8259[i] = qdev_get_gpio_in_named(dev, "isa", i);
}
/* generate SPD EEPROM data */
generate_eeprom_spd(&smbus_eeprom_buf[0 * 256], ram_size);

View File

@ -68,7 +68,7 @@ static void isa_ne2000_realizefn(DeviceState *dev, Error **errp)
ne2000_setup_io(s, DEVICE(isadev), 0x20);
isa_register_ioport(isadev, &s->io, isa->iobase);
isa_init_irq(isadev, &s->irq, isa->isairq);
s->irq = isa_get_irq(isadev, isa->isairq);
qemu_macaddr_default_if_unset(&s->c.macaddr);
ne2000_reset(s);

View File

@ -42,6 +42,7 @@ struct M48txxISAState {
ISADevice parent_obj;
M48t59State state;
uint32_t io_base;
uint8_t isairq;
MemoryRegion io;
};
@ -79,6 +80,7 @@ static void m48txx_isa_toggle_lock(Nvram *obj, int lock)
static Property m48t59_isa_properties[] = {
DEFINE_PROP_INT32("base-year", M48txxISAState, state.base_year, 0),
DEFINE_PROP_UINT32("iobase", M48txxISAState, io_base, 0x74),
DEFINE_PROP_UINT8("irq", M48txxISAState, isairq, 8),
DEFINE_PROP_END_OF_LIST(),
};
@ -97,9 +99,14 @@ static void m48t59_isa_realize(DeviceState *dev, Error **errp)
M48txxISAState *d = M48TXX_ISA(dev);
M48t59State *s = &d->state;
if (d->isairq >= ISA_NUM_IRQS) {
error_setg(errp, "Maximum value for \"irq\" is: %u", ISA_NUM_IRQS - 1);
return;
}
s->model = u->info.model;
s->size = u->info.size;
isa_init_irq(isadev, &s->IRQ, 8);
s->IRQ = isa_get_irq(isadev, d->isairq);
m48t59_realize_common(s, errp);
memory_region_init_io(&d->io, OBJECT(dev), &m48t59_io_ops, s, "m48t59", 4);
if (d->io_base != 0) {

View File

@ -912,6 +912,11 @@ static void rtc_realizefn(DeviceState *dev, Error **errp)
s->base_year = 0;
}
if (s->isairq >= ISA_NUM_IRQS) {
error_setg(errp, "Maximum value for \"irq\" is: %u", ISA_NUM_IRQS - 1);
return;
}
rtc_set_date_from_host(isadev);
switch (s->lost_tick_policy) {
@ -957,15 +962,17 @@ ISADevice *mc146818_rtc_init(ISABus *bus, int base_year, qemu_irq intercept_irq)
{
DeviceState *dev;
ISADevice *isadev;
RTCState *s;
isadev = isa_new(TYPE_MC146818_RTC);
dev = DEVICE(isadev);
s = MC146818_RTC(isadev);
qdev_prop_set_int32(dev, "base_year", base_year);
isa_realize_and_unref(isadev, bus, &error_fatal);
if (intercept_irq) {
qdev_connect_gpio_out(dev, 0, intercept_irq);
} else {
isa_connect_gpio_out(isadev, 0, RTC_ISA_IRQ);
isa_connect_gpio_out(isadev, 0, s->isairq);
}
object_property_add_alias(qdev_get_machine(), "rtc-time", OBJECT(isadev),
@ -976,6 +983,7 @@ ISADevice *mc146818_rtc_init(ISABus *bus, int base_year, qemu_irq intercept_irq)
static Property mc146818rtc_properties[] = {
DEFINE_PROP_INT32("base_year", RTCState, base_year, 1980),
DEFINE_PROP_UINT8("irq", RTCState, isairq, RTC_ISA_IRQ),
DEFINE_PROP_LOSTTICKPOLICY("lost_tick_policy", RTCState,
lost_tick_policy, LOST_TICK_POLICY_DISCARD),
DEFINE_PROP_END_OF_LIST(),
@ -1011,6 +1019,7 @@ static void rtc_reset_hold(Object *obj)
static void rtc_build_aml(ISADevice *isadev, Aml *scope)
{
RTCState *s = MC146818_RTC(isadev);
Aml *dev;
Aml *crs;
@ -1021,7 +1030,7 @@ static void rtc_build_aml(ISADevice *isadev, Aml *scope)
crs = aml_resource_template();
aml_append(crs, aml_io(AML_DECODE16, RTC_ISA_BASE, RTC_ISA_BASE,
0x01, 0x08));
aml_append(crs, aml_irq_no_flags(RTC_ISA_IRQ));
aml_append(crs, aml_irq_no_flags(s->isairq));
dev = aml_device("RTC");
aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0B00")));

View File

@ -127,7 +127,7 @@ static void tpm_tis_isa_realizefn(DeviceState *dev, Error **errp)
return;
}
isa_init_irq(ISA_DEVICE(dev), &s->irq, s->irq_num);
s->irq = isa_get_irq(ISA_DEVICE(dev), s->irq_num);
memory_region_add_subregion(isa_address_space(ISA_DEVICE(dev)),
TPM_TIS_ADDR_BASE, &s->mmio);

View File

@ -83,8 +83,6 @@ struct ISADevice {
DeviceState parent_obj;
/*< public >*/
int8_t isairq[2]; /* -1 = unassigned */
int nirqs;
int ioport_id;
};
@ -92,7 +90,6 @@ ISABus *isa_bus_new(DeviceState *dev, MemoryRegion *address_space,
MemoryRegion *address_space_io, Error **errp);
void isa_bus_irqs(ISABus *bus, qemu_irq *irqs);
qemu_irq isa_get_irq(ISADevice *dev, unsigned isairq);
void isa_init_irq(ISADevice *dev, qemu_irq *p, unsigned isairq);
void isa_connect_gpio_out(ISADevice *isadev, int gpioirq, unsigned isairq);
void isa_bus_dma(ISABus *bus, IsaDma *dma8, IsaDma *dma16);
IsaDma *isa_get_dma(ISABus *bus, int nchan);

View File

@ -9,9 +9,6 @@
#include "exec/memory.h"
/* gt64xxx.c */
PCIBus *gt64120_register(qemu_irq *pic);
/* bonito.c */
PCIBus *bonito_init(qemu_irq *pic);

View File

@ -25,6 +25,7 @@ struct RTCState {
MemoryRegion coalesced_io;
uint8_t cmos_data[128];
uint8_t cmos_index;
uint8_t isairq;
int32_t base_year;
uint64_t base_rtc;
uint64_t last_update;

View File

@ -70,8 +70,6 @@ typedef struct PIIXState PIIX3State;
DECLARE_INSTANCE_CHECKER(PIIX3State, PIIX3_PCI_DEVICE,
TYPE_PIIX3_PCI_DEVICE)
extern PCIDevice *piix4_dev;
PIIX3State *piix3_create(PCIBus *pci_bus, ISABus **isa_bus);
DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus);

View File

@ -434,14 +434,13 @@ static void mips_cpu_disas_set_info(CPUState *s, disassemble_info *info)
* Since commit 6af0bf9c7c3 this model assumes a CPU clocked at 200MHz.
*/
#define CPU_FREQ_HZ_DEFAULT 200000000
#define CP0_COUNT_RATE_DEFAULT 2
static void mips_cp0_period_set(MIPSCPU *cpu)
{
CPUMIPSState *env = &cpu->env;
env->cp0_count_ns = clock_ticks_to_ns(MIPS_CPU(cpu)->clock,
cpu->cp0_count_rate);
env->cpu_model->CCRes);
assert(env->cp0_count_ns);
}
@ -514,13 +513,6 @@ static ObjectClass *mips_cpu_class_by_name(const char *cpu_model)
return oc;
}
static Property mips_cpu_properties[] = {
/* CP0 timer running at half the clock of the CPU */
DEFINE_PROP_UINT32("cp0-count-rate", MIPSCPU, cp0_count_rate,
CP0_COUNT_RATE_DEFAULT),
DEFINE_PROP_END_OF_LIST()
};
#ifndef CONFIG_USER_ONLY
#include "hw/core/sysemu-cpu-ops.h"
@ -560,7 +552,6 @@ static void mips_cpu_class_init(ObjectClass *c, void *data)
device_class_set_parent_realize(dc, mips_cpu_realizefn,
&mcc->parent_realize);
device_class_set_parent_reset(dc, mips_cpu_reset, &mcc->parent_reset);
device_class_set_props(dc, mips_cpu_properties);
cc->class_by_name = mips_cpu_class_by_name;
cc->has_work = mips_cpu_has_work;

View File

@ -1167,7 +1167,6 @@ typedef struct CPUArchState {
* @env: #CPUMIPSState
* @clock: this CPU input clock (may be connected
* to an output clock from another device).
* @cp0_count_rate: rate at which the coprocessor 0 counter increments
*
* A MIPS CPU.
*/
@ -1179,14 +1178,6 @@ struct ArchCPU {
Clock *clock;
CPUNegativeOffsetState neg;
CPUMIPSState env;
/*
* The Count register acts as a timer, incrementing at a constant rate,
* whether or not an instruction is executed, retired, or any forward
* progress is made through the pipeline. The rate at which the counter
* increments is implementation dependent, and is a function of the
* pipeline clock of the processor, not the issue width of the processor.
*/
unsigned cp0_count_rate;
};

View File

@ -47,6 +47,15 @@ struct mips_def_t {
target_ulong CP0_LLAddr_rw_bitmask;
int CP0_LLAddr_shift;
int32_t SYNCI_Step;
/*
* @CCRes: rate at which the coprocessor 0 counter increments
*
* The Count register acts as a timer, incrementing at a constant rate,
* whether or not an instruction is executed, retired, or any forward
* progress is made through the pipeline. The rate at which the counter
* increments is implementation dependent, and is a function of the
* pipeline clock of the processor, not the issue width of the processor.
*/
int32_t CCRes;
int32_t CP0_Status_rw_bitmask;
int32_t CP0_TCStatus_rw_bitmask;

View File

@ -23,6 +23,9 @@ from avocado.utils import ssh
@skipUnless(os.getenv('AVOCADO_TIMEOUT_EXPECTED'), 'Test might timeout')
@skipUnless(ssh.SSH_CLIENT_BINARY, 'No SSH client available')
class LinuxSSH(QemuSystemTest, LinuxSSHMixIn):
"""
:avocado: tags=accel:tcg
"""
timeout = 150 # Not for 'configure --enable-debug --enable-debug-tcg'

View File

@ -15,7 +15,6 @@ Testing:
fdtypeA = "auto"
fdtypeB = "auto"
fallback = "288"
isa irq 6
bus: floppy-bus.0
type floppy-bus
dev: floppy, id ""
@ -43,7 +42,6 @@ Testing: -fda TEST_DIR/t.qcow2
fdtypeA = "auto"
fdtypeB = "auto"
fallback = "288"
isa irq 6
bus: floppy-bus.0
type floppy-bus
dev: floppy, id ""
@ -81,7 +79,6 @@ Testing: -fdb TEST_DIR/t.qcow2
fdtypeA = "auto"
fdtypeB = "auto"
fallback = "288"
isa irq 6
bus: floppy-bus.0
type floppy-bus
dev: floppy, id ""
@ -135,7 +132,6 @@ Testing: -fda TEST_DIR/t.qcow2 -fdb TEST_DIR/t.qcow2.2
fdtypeA = "auto"
fdtypeB = "auto"
fallback = "288"
isa irq 6
bus: floppy-bus.0
type floppy-bus
dev: floppy, id ""
@ -190,7 +186,6 @@ Testing: -fdb
fdtypeA = "auto"
fdtypeB = "auto"
fallback = "288"
isa irq 6
bus: floppy-bus.0
type floppy-bus
dev: floppy, id ""
@ -230,7 +225,6 @@ Testing: -drive if=floppy,file=TEST_DIR/t.qcow2
fdtypeA = "auto"
fdtypeB = "auto"
fallback = "288"
isa irq 6
bus: floppy-bus.0
type floppy-bus
dev: floppy, id ""
@ -268,7 +262,6 @@ Testing: -drive if=floppy,file=TEST_DIR/t.qcow2,index=1
fdtypeA = "auto"
fdtypeB = "auto"
fallback = "288"
isa irq 6
bus: floppy-bus.0
type floppy-bus
dev: floppy, id ""
@ -322,7 +315,6 @@ Testing: -drive if=floppy,file=TEST_DIR/t.qcow2 -drive if=floppy,file=TEST_DIR/t
fdtypeA = "auto"
fdtypeB = "auto"
fallback = "288"
isa irq 6
bus: floppy-bus.0
type floppy-bus
dev: floppy, id ""
@ -380,7 +372,6 @@ Testing: -drive if=none,file=TEST_DIR/t.qcow2 -device floppy,drive=none0
fdtypeA = "auto"
fdtypeB = "auto"
fallback = "288"
isa irq 6
bus: floppy-bus.0
type floppy-bus
dev: floppy, id ""
@ -418,7 +409,6 @@ Testing: -drive if=none,file=TEST_DIR/t.qcow2 -device floppy,drive=none0,unit=1
fdtypeA = "auto"
fdtypeB = "auto"
fallback = "288"
isa irq 6
bus: floppy-bus.0
type floppy-bus
dev: floppy, id ""
@ -456,7 +446,6 @@ Testing: -drive if=none,file=TEST_DIR/t.qcow2 -drive if=none,file=TEST_DIR/t.qco
fdtypeA = "auto"
fdtypeB = "auto"
fallback = "288"
isa irq 6
bus: floppy-bus.0
type floppy-bus
dev: floppy, id ""
@ -520,7 +509,6 @@ Testing: -fda TEST_DIR/t.qcow2 -drive if=none,file=TEST_DIR/t.qcow2.2 -device fl
fdtypeA = "auto"
fdtypeB = "auto"
fallback = "288"
isa irq 6
bus: floppy-bus.0
type floppy-bus
dev: floppy, id ""
@ -575,7 +563,6 @@ Testing: -fda TEST_DIR/t.qcow2 -drive if=none,file=TEST_DIR/t.qcow2.2 -device fl
fdtypeA = "auto"
fdtypeB = "auto"
fallback = "288"
isa irq 6
bus: floppy-bus.0
type floppy-bus
dev: floppy, id ""
@ -630,7 +617,6 @@ Testing: -fdb TEST_DIR/t.qcow2 -drive if=none,file=TEST_DIR/t.qcow2.2 -device fl
fdtypeA = "auto"
fdtypeB = "auto"
fallback = "288"
isa irq 6
bus: floppy-bus.0
type floppy-bus
dev: floppy, id ""
@ -685,7 +671,6 @@ Testing: -fdb TEST_DIR/t.qcow2 -drive if=none,file=TEST_DIR/t.qcow2.2 -device fl
fdtypeA = "auto"
fdtypeB = "auto"
fallback = "288"
isa irq 6
bus: floppy-bus.0
type floppy-bus
dev: floppy, id ""
@ -749,7 +734,6 @@ Testing: -drive if=floppy,file=TEST_DIR/t.qcow2 -drive if=none,file=TEST_DIR/t.q
fdtypeA = "auto"
fdtypeB = "auto"
fallback = "288"
isa irq 6
bus: floppy-bus.0
type floppy-bus
dev: floppy, id ""
@ -804,7 +788,6 @@ Testing: -drive if=floppy,file=TEST_DIR/t.qcow2 -drive if=none,file=TEST_DIR/t.q
fdtypeA = "auto"
fdtypeB = "auto"
fallback = "288"
isa irq 6
bus: floppy-bus.0
type floppy-bus
dev: floppy, id ""
@ -865,7 +848,6 @@ Testing: -drive if=none,file=TEST_DIR/t.qcow2 -global floppy.drive=none0 -device
fdtypeA = "auto"
fdtypeB = "auto"
fallback = "288"
isa irq 6
bus: floppy-bus.0
type floppy-bus
dev: floppy, id ""
@ -933,7 +915,6 @@ Testing: -device floppy
fdtypeA = "auto"
fdtypeB = "auto"
fallback = "288"
isa irq 6
bus: floppy-bus.0
type floppy-bus
dev: floppy, id ""
@ -958,7 +939,6 @@ Testing: -device floppy,drive-type=120
fdtypeA = "auto"
fdtypeB = "auto"
fallback = "288"
isa irq 6
bus: floppy-bus.0
type floppy-bus
dev: floppy, id ""
@ -983,7 +963,6 @@ Testing: -device floppy,drive-type=144
fdtypeA = "auto"
fdtypeB = "auto"
fallback = "288"
isa irq 6
bus: floppy-bus.0
type floppy-bus
dev: floppy, id ""
@ -1008,7 +987,6 @@ Testing: -device floppy,drive-type=288
fdtypeA = "auto"
fdtypeB = "auto"
fallback = "288"
isa irq 6
bus: floppy-bus.0
type floppy-bus
dev: floppy, id ""
@ -1036,7 +1014,6 @@ Testing: -drive if=none,file=TEST_DIR/t.qcow2 -device floppy,drive=none0,drive-t
fdtypeA = "auto"
fdtypeB = "auto"
fallback = "288"
isa irq 6
bus: floppy-bus.0
type floppy-bus
dev: floppy, id ""
@ -1074,7 +1051,6 @@ Testing: -drive if=none,file=TEST_DIR/t.qcow2 -device floppy,drive=none0,drive-t
fdtypeA = "auto"
fdtypeB = "auto"
fallback = "288"
isa irq 6
bus: floppy-bus.0
type floppy-bus
dev: floppy, id ""
@ -1115,7 +1091,6 @@ Testing: -drive if=none,file=TEST_DIR/t.qcow2 -device floppy,drive=none0,logical
fdtypeA = "auto"
fdtypeB = "auto"
fallback = "288"
isa irq 6
bus: floppy-bus.0
type floppy-bus
dev: floppy, id ""
@ -1153,7 +1128,6 @@ Testing: -drive if=none,file=TEST_DIR/t.qcow2 -device floppy,drive=none0,physica
fdtypeA = "auto"
fdtypeB = "auto"
fallback = "288"
isa irq 6
bus: floppy-bus.0
type floppy-bus
dev: floppy, id ""