Misc HW patch queue
- Fix CXL Fixed Memory Window interleave-granularity typo - Fix for DMA re-entrancy abuse with VirtIO devices (CVE-2024-3446) - Fix out-of-bound access in NAND block buffer - Fix memory leak in AppleSMC reset() handler - Avoid VirtIO crypto backends abort o invalid session ID - Fix overflow in LAN9118 MIL TX FIFO - Fix overflow when abusing SDHCI TRNMOD register (CVE-2024-3447) - Fix overrun in short fragmented packet SCTP checksum (CVE-2024-3567) - Remove unused assignment in virtio-snd model (Coverity 1542933 & 1542934) -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmYWV94ACgkQ4+MsLN6t wN4+ew/+PqDmL4S8xXGQPi6Q8fxAogbwo1mPptDO2y8ChEjtc9LI5HOLu90EYz7A s62SPDsh3gx8vOthrJVEk0LqCbw4N3s5dFdmHNrnjXCsKQFifgucQ+yZy8ipy34N wWHSJ9nipBQLvkK23iCxkbl3cTyr44Rlweae/TZR4/FjFCEe3N555LQU0fruEqRo AHW1RjYhGvOfL9knLWzIQqW2QjcCnKky3bJhwHh3crfWE69nvVJTkbSF6oUxWSG0 RzSToK3nN5tmvUlyvbTBE9u0K9JkOcbtMQiAgj39nR9xpsaUZZa0zSWOmliYIuBC kWuUY0/nAQk6gxHBKyu8q09ACBbzeCp+lVPOYXdxax8QMeURSa9fB1qY7JmI5QAZ bg0ypD2pvbxhidU5TWpw7araAYyBOJrEYjnOkhXB4oa01ZWu2d0uNhGWo83h3Wjy ahKrNDoVIQIdh8QkYy/ZqDwhCMoNM+pQcfUzsYxkqZC/JiiM/qxm87pTHQ/x2yQA l0MLzljGv90/dklokrqeg4REwMqfwzc74PUbKdCk43saemmatslK3ktu3xAzUlQW 2xmZQTnKwXDf+U3YnYryDddow2LsU7qlu8dlDGNd0WIrE5LRCCXzhv8la66O0jVE qMOHpBPkwMlACBwiXuxV6ucelk4vy+XvabeQUsizm0m+PR7TwJY= =9phd -----END PGP SIGNATURE----- Merge tag 'hw-misc-20240410' of https://github.com/philmd/qemu into staging Misc HW patch queue - Fix CXL Fixed Memory Window interleave-granularity typo - Fix for DMA re-entrancy abuse with VirtIO devices (CVE-2024-3446) - Fix out-of-bound access in NAND block buffer - Fix memory leak in AppleSMC reset() handler - Avoid VirtIO crypto backends abort o invalid session ID - Fix overflow in LAN9118 MIL TX FIFO - Fix overflow when abusing SDHCI TRNMOD register (CVE-2024-3447) - Fix overrun in short fragmented packet SCTP checksum (CVE-2024-3567) - Remove unused assignment in virtio-snd model (Coverity 1542933 & 1542934) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmYWV94ACgkQ4+MsLN6t # wN4+ew/+PqDmL4S8xXGQPi6Q8fxAogbwo1mPptDO2y8ChEjtc9LI5HOLu90EYz7A # s62SPDsh3gx8vOthrJVEk0LqCbw4N3s5dFdmHNrnjXCsKQFifgucQ+yZy8ipy34N # wWHSJ9nipBQLvkK23iCxkbl3cTyr44Rlweae/TZR4/FjFCEe3N555LQU0fruEqRo # AHW1RjYhGvOfL9knLWzIQqW2QjcCnKky3bJhwHh3crfWE69nvVJTkbSF6oUxWSG0 # RzSToK3nN5tmvUlyvbTBE9u0K9JkOcbtMQiAgj39nR9xpsaUZZa0zSWOmliYIuBC # kWuUY0/nAQk6gxHBKyu8q09ACBbzeCp+lVPOYXdxax8QMeURSa9fB1qY7JmI5QAZ # bg0ypD2pvbxhidU5TWpw7araAYyBOJrEYjnOkhXB4oa01ZWu2d0uNhGWo83h3Wjy # ahKrNDoVIQIdh8QkYy/ZqDwhCMoNM+pQcfUzsYxkqZC/JiiM/qxm87pTHQ/x2yQA # l0MLzljGv90/dklokrqeg4REwMqfwzc74PUbKdCk43saemmatslK3ktu3xAzUlQW # 2xmZQTnKwXDf+U3YnYryDddow2LsU7qlu8dlDGNd0WIrE5LRCCXzhv8la66O0jVE # qMOHpBPkwMlACBwiXuxV6ucelk4vy+XvabeQUsizm0m+PR7TwJY= # =9phd # -----END PGP SIGNATURE----- # gpg: Signature made Wed 10 Apr 2024 10:11:58 BST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'hw-misc-20240410' of https://github.com/philmd/qemu: hw/audio/virtio-snd: Remove unused assignment hw/net/net_tx_pkt: Fix overrun in update_sctp_checksum() hw/sd/sdhci: Do not update TRNMOD when Command Inhibit (DAT) is set hw/net/lan9118: Fix overflow in MIL TX FIFO hw/net/lan9118: Replace magic '2048' value by MIL_TXFIFO_SIZE definition backends/cryptodev: Do not abort for invalid session ID hw/misc/applesmc: Fix memory leak in reset() handler hw/misc/applesmc: Do not call DeviceReset from DeviceRealize hw/block/nand: Fix out-of-bound access in NAND block buffer hw/block/nand: Have blk_load() take unsigned offset and return boolean hw/block/nand: Factor nand_load_iolen() method out qemu-options: Fix CXL Fixed Memory Window interleave-granularity typo hw/virtio/virtio-crypto: Protect from DMA re-entrancy bugs hw/char/virtio-serial-bus: Protect from DMA re-entrancy bugs hw/display/virtio-gpu: Protect from DMA re-entrancy bugs hw/virtio: Introduce virtio_bh_new_guarded() helper Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
commit
f243175727
@ -427,7 +427,9 @@ static int cryptodev_builtin_close_session(
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CRYPTODEV_BACKEND_BUILTIN(backend);
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CRYPTODEV_BACKEND_BUILTIN(backend);
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CryptoDevBackendBuiltinSession *session;
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CryptoDevBackendBuiltinSession *session;
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assert(session_id < MAX_NUM_SESSIONS && builtin->sessions[session_id]);
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if (session_id >= MAX_NUM_SESSIONS || !builtin->sessions[session_id]) {
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return -VIRTIO_CRYPTO_INVSESS;
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}
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session = builtin->sessions[session_id];
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session = builtin->sessions[session_id];
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if (session->cipher) {
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if (session->cipher) {
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@ -885,7 +885,9 @@ static void virtio_snd_handle_tx_xfer(VirtIODevice *vdev, VirtQueue *vq)
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}
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}
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trace_virtio_snd_handle_tx_xfer();
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trace_virtio_snd_handle_tx_xfer();
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for (VirtIOSoundPCMStream *stream = NULL;; stream = NULL) {
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for (;;) {
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VirtIOSoundPCMStream *stream;
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elem = virtqueue_pop(vq, sizeof(VirtQueueElement));
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elem = virtqueue_pop(vq, sizeof(VirtQueueElement));
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if (!elem) {
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if (!elem) {
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break;
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break;
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@ -964,7 +966,9 @@ static void virtio_snd_handle_rx_xfer(VirtIODevice *vdev, VirtQueue *vq)
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}
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}
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trace_virtio_snd_handle_rx_xfer();
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trace_virtio_snd_handle_rx_xfer();
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for (VirtIOSoundPCMStream *stream = NULL;; stream = NULL) {
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for (;;) {
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VirtIOSoundPCMStream *stream;
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elem = virtqueue_pop(vq, sizeof(VirtQueueElement));
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elem = virtqueue_pop(vq, sizeof(VirtQueueElement));
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if (!elem) {
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if (!elem) {
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break;
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break;
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@ -84,7 +84,11 @@ struct NANDFlashState {
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void (*blk_write)(NANDFlashState *s);
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void (*blk_write)(NANDFlashState *s);
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void (*blk_erase)(NANDFlashState *s);
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void (*blk_erase)(NANDFlashState *s);
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void (*blk_load)(NANDFlashState *s, uint64_t addr, int offset);
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/*
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* Returns %true when block containing (@addr + @offset) is
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* successfully loaded, otherwise %false.
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*/
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bool (*blk_load)(NANDFlashState *s, uint64_t addr, unsigned offset);
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uint32_t ioaddr_vmstate;
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uint32_t ioaddr_vmstate;
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};
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};
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@ -243,9 +247,30 @@ static inline void nand_pushio_byte(NANDFlashState *s, uint8_t value)
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}
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}
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}
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}
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/*
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* nand_load_block: Load block containing (s->addr + @offset).
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* Returns length of data available at @offset in this block.
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*/
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static unsigned nand_load_block(NANDFlashState *s, unsigned offset)
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{
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unsigned iolen;
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if (!s->blk_load(s, s->addr, offset)) {
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return 0;
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}
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iolen = (1 << s->page_shift);
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if (s->gnd) {
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iolen += 1 << s->oob_shift;
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}
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assert(offset <= iolen);
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iolen -= offset;
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return iolen;
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}
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static void nand_command(NANDFlashState *s)
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static void nand_command(NANDFlashState *s)
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{
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{
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unsigned int offset;
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switch (s->cmd) {
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switch (s->cmd) {
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case NAND_CMD_READ0:
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case NAND_CMD_READ0:
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s->iolen = 0;
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s->iolen = 0;
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@ -271,12 +296,7 @@ static void nand_command(NANDFlashState *s)
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case NAND_CMD_NOSERIALREAD2:
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case NAND_CMD_NOSERIALREAD2:
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if (!(nand_flash_ids[s->chip_id].options & NAND_SAMSUNG_LP))
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if (!(nand_flash_ids[s->chip_id].options & NAND_SAMSUNG_LP))
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break;
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break;
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offset = s->addr & ((1 << s->addr_shift) - 1);
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s->iolen = nand_load_block(s, s->addr & ((1 << s->addr_shift) - 1));
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s->blk_load(s, s->addr, offset);
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if (s->gnd)
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s->iolen = (1 << s->page_shift) - offset;
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else
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s->iolen = (1 << s->page_shift) + (1 << s->oob_shift) - offset;
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break;
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break;
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case NAND_CMD_RESET:
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case NAND_CMD_RESET:
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@ -597,12 +617,7 @@ uint32_t nand_getio(DeviceState *dev)
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if (!s->iolen && s->cmd == NAND_CMD_READ0) {
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if (!s->iolen && s->cmd == NAND_CMD_READ0) {
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offset = (int) (s->addr & ((1 << s->addr_shift) - 1)) + s->offset;
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offset = (int) (s->addr & ((1 << s->addr_shift) - 1)) + s->offset;
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s->offset = 0;
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s->offset = 0;
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s->iolen = nand_load_block(s, offset);
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s->blk_load(s, s->addr, offset);
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if (s->gnd)
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s->iolen = (1 << s->page_shift) - offset;
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else
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s->iolen = (1 << s->page_shift) + (1 << s->oob_shift) - offset;
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}
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}
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if (s->ce || s->iolen <= 0) {
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if (s->ce || s->iolen <= 0) {
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@ -763,11 +778,15 @@ static void glue(nand_blk_erase_, NAND_PAGE_SIZE)(NANDFlashState *s)
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}
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}
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}
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}
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static void glue(nand_blk_load_, NAND_PAGE_SIZE)(NANDFlashState *s,
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static bool glue(nand_blk_load_, NAND_PAGE_SIZE)(NANDFlashState *s,
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uint64_t addr, int offset)
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uint64_t addr, unsigned offset)
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{
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{
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if (PAGE(addr) >= s->pages) {
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if (PAGE(addr) >= s->pages) {
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return;
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return false;
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}
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if (offset > NAND_PAGE_SIZE + OOB_SIZE) {
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return false;
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}
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}
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if (s->blk) {
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if (s->blk) {
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@ -795,6 +814,8 @@ static void glue(nand_blk_load_, NAND_PAGE_SIZE)(NANDFlashState *s,
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offset, NAND_PAGE_SIZE + OOB_SIZE - offset);
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offset, NAND_PAGE_SIZE + OOB_SIZE - offset);
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s->ioaddr = s->io;
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s->ioaddr = s->io;
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}
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}
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return true;
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}
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}
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static void glue(nand_init_, NAND_PAGE_SIZE)(NANDFlashState *s)
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static void glue(nand_init_, NAND_PAGE_SIZE)(NANDFlashState *s)
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@ -985,8 +985,7 @@ static void virtser_port_device_realize(DeviceState *dev, Error **errp)
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return;
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return;
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}
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}
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port->bh = qemu_bh_new_guarded(flush_queued_data_bh, port,
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port->bh = virtio_bh_new_guarded(dev, flush_queued_data_bh, port);
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&dev->mem_reentrancy_guard);
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port->elem = NULL;
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port->elem = NULL;
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}
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}
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@ -1492,10 +1492,8 @@ void virtio_gpu_device_realize(DeviceState *qdev, Error **errp)
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g->ctrl_vq = virtio_get_queue(vdev, 0);
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g->ctrl_vq = virtio_get_queue(vdev, 0);
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g->cursor_vq = virtio_get_queue(vdev, 1);
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g->cursor_vq = virtio_get_queue(vdev, 1);
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g->ctrl_bh = qemu_bh_new_guarded(virtio_gpu_ctrl_bh, g,
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g->ctrl_bh = virtio_bh_new_guarded(qdev, virtio_gpu_ctrl_bh, g);
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&qdev->mem_reentrancy_guard);
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g->cursor_bh = virtio_bh_new_guarded(qdev, virtio_gpu_cursor_bh, g);
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g->cursor_bh = qemu_bh_new_guarded(virtio_gpu_cursor_bh, g,
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&qdev->mem_reentrancy_guard);
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g->reset_bh = qemu_bh_new(virtio_gpu_reset_bh, g);
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g->reset_bh = qemu_bh_new(virtio_gpu_reset_bh, g);
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qemu_cond_init(&g->reset_cond);
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qemu_cond_init(&g->reset_cond);
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QTAILQ_INIT(&g->reslist);
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QTAILQ_INIT(&g->reslist);
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@ -274,6 +274,7 @@ static void qdev_applesmc_isa_reset(DeviceState *dev)
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/* Remove existing entries */
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/* Remove existing entries */
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QLIST_FOREACH_SAFE(d, &s->data_def, node, next) {
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QLIST_FOREACH_SAFE(d, &s->data_def, node, next) {
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QLIST_REMOVE(d, node);
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QLIST_REMOVE(d, node);
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g_free(d);
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}
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}
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s->status = 0x00;
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s->status = 0x00;
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s->status_1e = 0x00;
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s->status_1e = 0x00;
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@ -342,7 +343,6 @@ static void applesmc_isa_realize(DeviceState *dev, Error **errp)
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}
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}
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QLIST_INIT(&s->data_def);
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QLIST_INIT(&s->data_def);
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qdev_applesmc_isa_reset(dev);
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}
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}
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static Property applesmc_isa_properties[] = {
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static Property applesmc_isa_properties[] = {
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@ -150,6 +150,12 @@ do { printf("lan9118: " fmt , ## __VA_ARGS__); } while (0)
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#define GPT_TIMER_EN 0x20000000
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#define GPT_TIMER_EN 0x20000000
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/*
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* The MAC Interface Layer (MIL), within the MAC, contains a 2K Byte transmit
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* and a 128 Byte receive FIFO which is separate from the TX and RX FIFOs.
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*/
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#define MIL_TXFIFO_SIZE 2048
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enum tx_state {
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enum tx_state {
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TX_IDLE,
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TX_IDLE,
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TX_B,
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TX_B,
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@ -166,7 +172,7 @@ typedef struct {
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int32_t pad;
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int32_t pad;
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int32_t fifo_used;
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int32_t fifo_used;
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int32_t len;
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int32_t len;
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uint8_t data[2048];
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uint8_t data[MIL_TXFIFO_SIZE];
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} LAN9118Packet;
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} LAN9118Packet;
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static const VMStateDescription vmstate_lan9118_packet = {
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static const VMStateDescription vmstate_lan9118_packet = {
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@ -182,7 +188,7 @@ static const VMStateDescription vmstate_lan9118_packet = {
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VMSTATE_INT32(pad, LAN9118Packet),
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VMSTATE_INT32(pad, LAN9118Packet),
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VMSTATE_INT32(fifo_used, LAN9118Packet),
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VMSTATE_INT32(fifo_used, LAN9118Packet),
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VMSTATE_INT32(len, LAN9118Packet),
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VMSTATE_INT32(len, LAN9118Packet),
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VMSTATE_UINT8_ARRAY(data, LAN9118Packet, 2048),
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VMSTATE_UINT8_ARRAY(data, LAN9118Packet, MIL_TXFIFO_SIZE),
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VMSTATE_END_OF_LIST()
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VMSTATE_END_OF_LIST()
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}
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}
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};
|
};
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@ -544,7 +550,7 @@ static ssize_t lan9118_receive(NetClientState *nc, const uint8_t *buf,
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return -1;
|
return -1;
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}
|
}
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|
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if (size >= 2048 || size < 14) {
|
if (size >= MIL_TXFIFO_SIZE || size < 14) {
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return -1;
|
return -1;
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}
|
}
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|
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@ -793,8 +799,22 @@ static void tx_fifo_push(lan9118_state *s, uint32_t val)
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/* Documentation is somewhat unclear on the ordering of bytes
|
/* Documentation is somewhat unclear on the ordering of bytes
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in FIFO words. Empirical results show it to be little-endian.
|
in FIFO words. Empirical results show it to be little-endian.
|
||||||
*/
|
*/
|
||||||
/* TODO: FIFO overflow checking. */
|
|
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while (n--) {
|
while (n--) {
|
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|
if (s->txp->len == MIL_TXFIFO_SIZE) {
|
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|
/*
|
||||||
|
* No more space in the FIFO. The datasheet is not
|
||||||
|
* precise about this case. We choose what is easiest
|
||||||
|
* to model: the packet is truncated, and TXE is raised.
|
||||||
|
*
|
||||||
|
* Note, it could be a fragmented packet, but we currently
|
||||||
|
* do not handle that (see earlier TX_B case).
|
||||||
|
*/
|
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|
qemu_log_mask(LOG_GUEST_ERROR,
|
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|
"MIL TX FIFO overrun, discarding %u byte%s\n",
|
||||||
|
n, n > 1 ? "s" : "");
|
||||||
|
s->int_sts |= TXE_INT;
|
||||||
|
break;
|
||||||
|
}
|
||||||
s->txp->data[s->txp->len] = val & 0xff;
|
s->txp->data[s->txp->len] = val & 0xff;
|
||||||
s->txp->len++;
|
s->txp->len++;
|
||||||
val >>= 8;
|
val >>= 8;
|
||||||
|
@ -141,6 +141,10 @@ bool net_tx_pkt_update_sctp_checksum(struct NetTxPkt *pkt)
|
|||||||
uint32_t csum = 0;
|
uint32_t csum = 0;
|
||||||
struct iovec *pl_start_frag = pkt->vec + NET_TX_PKT_PL_START_FRAG;
|
struct iovec *pl_start_frag = pkt->vec + NET_TX_PKT_PL_START_FRAG;
|
||||||
|
|
||||||
|
if (iov_size(pl_start_frag, pkt->payload_frags) < 8 + sizeof(csum)) {
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
if (iov_from_buf(pl_start_frag, pkt->payload_frags, 8, &csum, sizeof(csum)) < sizeof(csum)) {
|
if (iov_from_buf(pl_start_frag, pkt->payload_frags, 8, &csum, sizeof(csum)) < sizeof(csum)) {
|
||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
|
@ -473,6 +473,7 @@ static uint32_t sdhci_read_dataport(SDHCIState *s, unsigned size)
|
|||||||
}
|
}
|
||||||
|
|
||||||
for (i = 0; i < size; i++) {
|
for (i = 0; i < size; i++) {
|
||||||
|
assert(s->data_count < s->buf_maxsz);
|
||||||
value |= s->fifo_buffer[s->data_count] << i * 8;
|
value |= s->fifo_buffer[s->data_count] << i * 8;
|
||||||
s->data_count++;
|
s->data_count++;
|
||||||
/* check if we've read all valid data (blksize bytes) from buffer */
|
/* check if we've read all valid data (blksize bytes) from buffer */
|
||||||
@ -561,6 +562,7 @@ static void sdhci_write_dataport(SDHCIState *s, uint32_t value, unsigned size)
|
|||||||
}
|
}
|
||||||
|
|
||||||
for (i = 0; i < size; i++) {
|
for (i = 0; i < size; i++) {
|
||||||
|
assert(s->data_count < s->buf_maxsz);
|
||||||
s->fifo_buffer[s->data_count] = value & 0xFF;
|
s->fifo_buffer[s->data_count] = value & 0xFF;
|
||||||
s->data_count++;
|
s->data_count++;
|
||||||
value >>= 8;
|
value >>= 8;
|
||||||
@ -1208,6 +1210,12 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val, unsigned size)
|
|||||||
if (!(s->capareg & R_SDHC_CAPAB_SDMA_MASK)) {
|
if (!(s->capareg & R_SDHC_CAPAB_SDMA_MASK)) {
|
||||||
value &= ~SDHC_TRNS_DMA;
|
value &= ~SDHC_TRNS_DMA;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* TRNMOD writes are inhibited while Command Inhibit (DAT) is true */
|
||||||
|
if (s->prnsts & SDHC_DATA_INHIBIT) {
|
||||||
|
mask |= 0xffff;
|
||||||
|
}
|
||||||
|
|
||||||
MASKED_WRITE(s->trnmod, mask, value & SDHC_TRNMOD_MASK);
|
MASKED_WRITE(s->trnmod, mask, value & SDHC_TRNMOD_MASK);
|
||||||
MASKED_WRITE(s->cmdreg, mask >> 16, value >> 16);
|
MASKED_WRITE(s->cmdreg, mask >> 16, value >> 16);
|
||||||
|
|
||||||
|
@ -1080,8 +1080,8 @@ static void virtio_crypto_device_realize(DeviceState *dev, Error **errp)
|
|||||||
vcrypto->vqs[i].dataq =
|
vcrypto->vqs[i].dataq =
|
||||||
virtio_add_queue(vdev, 1024, virtio_crypto_handle_dataq_bh);
|
virtio_add_queue(vdev, 1024, virtio_crypto_handle_dataq_bh);
|
||||||
vcrypto->vqs[i].dataq_bh =
|
vcrypto->vqs[i].dataq_bh =
|
||||||
qemu_bh_new_guarded(virtio_crypto_dataq_bh, &vcrypto->vqs[i],
|
virtio_bh_new_guarded(dev, virtio_crypto_dataq_bh,
|
||||||
&dev->mem_reentrancy_guard);
|
&vcrypto->vqs[i]);
|
||||||
vcrypto->vqs[i].vcrypto = vcrypto;
|
vcrypto->vqs[i].vcrypto = vcrypto;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -4145,3 +4145,13 @@ static void virtio_register_types(void)
|
|||||||
}
|
}
|
||||||
|
|
||||||
type_init(virtio_register_types)
|
type_init(virtio_register_types)
|
||||||
|
|
||||||
|
QEMUBH *virtio_bh_new_guarded_full(DeviceState *dev,
|
||||||
|
QEMUBHFunc *cb, void *opaque,
|
||||||
|
const char *name)
|
||||||
|
{
|
||||||
|
DeviceState *transport = qdev_get_parent_bus(dev)->parent;
|
||||||
|
|
||||||
|
return qemu_bh_new_full(cb, opaque, name,
|
||||||
|
&transport->mem_reentrancy_guard);
|
||||||
|
}
|
||||||
|
@ -22,6 +22,7 @@
|
|||||||
#include "standard-headers/linux/virtio_config.h"
|
#include "standard-headers/linux/virtio_config.h"
|
||||||
#include "standard-headers/linux/virtio_ring.h"
|
#include "standard-headers/linux/virtio_ring.h"
|
||||||
#include "qom/object.h"
|
#include "qom/object.h"
|
||||||
|
#include "block/aio.h"
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* A guest should never accept this. It implies negotiation is broken
|
* A guest should never accept this. It implies negotiation is broken
|
||||||
@ -508,4 +509,10 @@ static inline bool virtio_device_disabled(VirtIODevice *vdev)
|
|||||||
bool virtio_legacy_allowed(VirtIODevice *vdev);
|
bool virtio_legacy_allowed(VirtIODevice *vdev);
|
||||||
bool virtio_legacy_check_disabled(VirtIODevice *vdev);
|
bool virtio_legacy_check_disabled(VirtIODevice *vdev);
|
||||||
|
|
||||||
|
QEMUBH *virtio_bh_new_guarded_full(DeviceState *dev,
|
||||||
|
QEMUBHFunc *cb, void *opaque,
|
||||||
|
const char *name);
|
||||||
|
#define virtio_bh_new_guarded(dev, cb, opaque) \
|
||||||
|
virtio_bh_new_guarded_full((dev), (cb), (opaque), (stringify(cb)))
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
@ -151,14 +151,14 @@ SRST
|
|||||||
platform and configuration dependent.
|
platform and configuration dependent.
|
||||||
|
|
||||||
``interleave-granularity=granularity`` sets the granularity of
|
``interleave-granularity=granularity`` sets the granularity of
|
||||||
interleave. Default 256KiB. Only 256KiB, 512KiB, 1024KiB, 2048KiB
|
interleave. Default 256 (bytes). Only 256, 512, 1k, 2k,
|
||||||
4096KiB, 8192KiB and 16384KiB granularities supported.
|
4k, 8k and 16k granularities supported.
|
||||||
|
|
||||||
Example:
|
Example:
|
||||||
|
|
||||||
::
|
::
|
||||||
|
|
||||||
-machine cxl-fmw.0.targets.0=cxl.0,cxl-fmw.0.targets.1=cxl.1,cxl-fmw.0.size=128G,cxl-fmw.0.interleave-granularity=512k
|
-machine cxl-fmw.0.targets.0=cxl.0,cxl-fmw.0.targets.1=cxl.1,cxl-fmw.0.size=128G,cxl-fmw.0.interleave-granularity=512
|
||||||
ERST
|
ERST
|
||||||
|
|
||||||
DEF("M", HAS_ARG, QEMU_OPTION_M,
|
DEF("M", HAS_ARG, QEMU_OPTION_M,
|
||||||
|
Loading…
Reference in New Issue
Block a user