aspeed/smc: rework the prototype of the AspeedSMCFlash helper routines
Change the routines prototype to use a 'AspeedSMCFlash *' instead of 'AspeedSMCState *'. The result will help in making future changes clearer. Also change aspeed_smc_update_cs() which uselessly loops on all slave devices to update their status. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 1483979087-32663-4-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -328,19 +328,23 @@ static const MemoryRegionOps aspeed_smc_flash_default_ops = {
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},
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};
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static inline int aspeed_smc_flash_mode(const AspeedSMCState *s, int cs)
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static inline int aspeed_smc_flash_mode(const AspeedSMCFlash *fl)
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{
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return s->regs[s->r_ctrl0 + cs] & CTRL_CMD_MODE_MASK;
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const AspeedSMCState *s = fl->controller;
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return s->regs[s->r_ctrl0 + fl->id] & CTRL_CMD_MODE_MASK;
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}
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static inline bool aspeed_smc_is_usermode(const AspeedSMCState *s, int cs)
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static inline bool aspeed_smc_is_usermode(const AspeedSMCFlash *fl)
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{
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return aspeed_smc_flash_mode(s, cs) == CTRL_USERMODE;
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return aspeed_smc_flash_mode(fl) == CTRL_USERMODE;
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}
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static inline bool aspeed_smc_is_writable(const AspeedSMCState *s, int cs)
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static inline bool aspeed_smc_is_writable(const AspeedSMCFlash *fl)
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{
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return s->regs[s->r_conf] & (1 << (s->conf_enable_w0 + cs));
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const AspeedSMCState *s = fl->controller;
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return s->regs[s->r_conf] & (1 << (s->conf_enable_w0 + fl->id));
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}
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static uint64_t aspeed_smc_flash_read(void *opaque, hwaddr addr, unsigned size)
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@ -350,7 +354,7 @@ static uint64_t aspeed_smc_flash_read(void *opaque, hwaddr addr, unsigned size)
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uint64_t ret = 0;
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int i;
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if (aspeed_smc_is_usermode(s, fl->id)) {
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if (aspeed_smc_is_usermode(fl)) {
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for (i = 0; i < size; i++) {
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ret |= ssi_transfer(s->spi, 0x0) << (8 * i);
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}
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@ -370,13 +374,13 @@ static void aspeed_smc_flash_write(void *opaque, hwaddr addr, uint64_t data,
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const AspeedSMCState *s = fl->controller;
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int i;
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if (!aspeed_smc_is_writable(s, fl->id)) {
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if (!aspeed_smc_is_writable(fl)) {
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qemu_log_mask(LOG_GUEST_ERROR, "%s: flash is not writable at 0x%"
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HWADDR_PRIx "\n", __func__, addr);
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return;
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}
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if (!aspeed_smc_is_usermode(s, fl->id)) {
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if (!aspeed_smc_is_usermode(fl)) {
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qemu_log_mask(LOG_UNIMP, "%s: usermode not implemented\n",
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__func__);
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return;
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@ -397,18 +401,18 @@ static const MemoryRegionOps aspeed_smc_flash_ops = {
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},
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};
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static bool aspeed_smc_is_ce_stop_active(const AspeedSMCState *s, int cs)
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static inline bool aspeed_smc_is_ce_stop_active(const AspeedSMCFlash *fl)
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{
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return s->regs[s->r_ctrl0 + cs] & CTRL_CE_STOP_ACTIVE;
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const AspeedSMCState *s = fl->controller;
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return s->regs[s->r_ctrl0 + fl->id] & CTRL_CE_STOP_ACTIVE;
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}
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static void aspeed_smc_update_cs(const AspeedSMCState *s)
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static void aspeed_smc_flash_update_cs(AspeedSMCFlash *fl)
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{
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int i;
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const AspeedSMCState *s = fl->controller;
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for (i = 0; i < s->num_cs; ++i) {
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qemu_set_irq(s->cs_lines[i], aspeed_smc_is_ce_stop_active(s, i));
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}
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qemu_set_irq(s->cs_lines[fl->id], aspeed_smc_is_ce_stop_active(fl));
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}
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static void aspeed_smc_reset(DeviceState *d)
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@ -481,8 +485,9 @@ static void aspeed_smc_write(void *opaque, hwaddr addr, uint64_t data,
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addr == s->r_ce_ctrl) {
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s->regs[addr] = value;
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} else if (addr >= s->r_ctrl0 && addr < s->r_ctrl0 + s->num_cs) {
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int cs = addr - s->r_ctrl0;
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s->regs[addr] = value;
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aspeed_smc_update_cs(s);
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aspeed_smc_flash_update_cs(&s->flashes[cs]);
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} else if (addr >= R_SEG_ADDR0 &&
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addr < R_SEG_ADDR0 + s->ctrl->max_slaves) {
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int cs = addr - R_SEG_ADDR0;
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