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hw/arm/exynos4210: Drop Exynos4210Irq struct

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The only time we use the int_combiner_irq[] and ext_combiner_irq[]
arrays in the Exynos4210Irq struct is during realize of the SoC -- we
initialize them with the input IRQs of the combiner devices, and then
connect those to outputs of other devices in
exynos4210_init_board_irqs().  Now that the combiner objects are
easily accessible as s->int_combiner and s->ext_combiner we can make
the connections directly from one device to the other without going
via these arrays.

Since these are the only two remaining elements of Exynos4210Irq,
we can remove that struct entirely.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220404154658.565020-19-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2022-04-04 16:46:58 +01:00
parent cebef07df5
commit f37fc537fc
2 changed files with 8 additions and 32 deletions
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34
hw/arm/exynos4210.c
View File

@ -331,8 +331,9 @@ static int mapline_size(const int *mapline)
static void exynos4210_init_board_irqs(Exynos4210State *s)
{
uint32_t grp, bit, irq_id, n;
Exynos4210Irq *is = &s->irqs;
DeviceState *extgicdev = DEVICE(&s->ext_gic);
DeviceState *intcdev = DEVICE(&s->int_combiner);
DeviceState *extcdev = DEVICE(&s->ext_combiner);
int splitcount = 0;
DeviceState *splitter;
const int *mapline;
@ -375,8 +376,10 @@ static void exynos4210_init_board_irqs(Exynos4210State *s)
splitin = 0;
for (;;) {
s->irq_table[in] = qdev_get_gpio_in(splitter, 0);
qdev_connect_gpio_out(splitter, splitin, is->int_combiner_irq[in]);
qdev_connect_gpio_out(splitter, splitin + 1, is->ext_combiner_irq[in]);
qdev_connect_gpio_out(splitter, splitin,
qdev_get_gpio_in(intcdev, in));
qdev_connect_gpio_out(splitter, splitin + 1,
qdev_get_gpio_in(extcdev, in));
splitin += 2;
if (!mapline) {
break;
@ -414,11 +417,11 @@ static void exynos4210_init_board_irqs(Exynos4210State *s)
qdev_realize(splitter, NULL, &error_abort);
splitcount++;
s->irq_table[n] = qdev_get_gpio_in(splitter, 0);
qdev_connect_gpio_out(splitter, 0, is->int_combiner_irq[n]);
qdev_connect_gpio_out(splitter, 0, qdev_get_gpio_in(intcdev, n));
qdev_connect_gpio_out(splitter, 1,
qdev_get_gpio_in(extgicdev, irq_id - 32));
} else {
s->irq_table[n] = is->int_combiner_irq[n];
s->irq_table[n] = qdev_get_gpio_in(intcdev, n);
}
}
/*
@ -440,25 +443,6 @@ uint32_t exynos4210_get_irq(uint32_t grp, uint32_t bit)
return EXYNOS4210_COMBINER_GET_IRQ_NUM(grp, bit);
}
/*
* Get Combiner input GPIO into irqs structure
*/
static void exynos4210_combiner_get_gpioin(Exynos4210Irq *irqs,
DeviceState *dev, int ext)
{
int n;
int max;
qemu_irq *irq;
max = ext ? EXYNOS4210_MAX_EXT_COMBINER_IN_IRQ :
EXYNOS4210_MAX_INT_COMBINER_IN_IRQ;
irq = ext ? irqs->ext_combiner_irq : irqs->int_combiner_irq;
for (n = 0; n < max; n++) {
irq[n] = qdev_get_gpio_in(dev, n);
}
}
static uint8_t chipid_and_omr[] = { 0x11, 0x02, 0x21, 0x43,
0x09, 0x00, 0x00, 0x00 };
@ -630,7 +614,6 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp)
sysbus_connect_irq(busdev, n,
qdev_get_gpio_in(DEVICE(&s->a9mpcore), n));
}
exynos4210_combiner_get_gpioin(&s->irqs, DEVICE(&s->int_combiner), 0);
sysbus_mmio_map(busdev, 0, EXYNOS4210_INT_COMBINER_BASE_ADDR);
/* External Interrupt Combiner */
@ -640,7 +623,6 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp)
for (n = 0; n < EXYNOS4210_MAX_INT_COMBINER_OUT_IRQ; n++) {
sysbus_connect_irq(busdev, n, qdev_get_gpio_in(DEVICE(&s->ext_gic), n));
}
exynos4210_combiner_get_gpioin(&s->irqs, DEVICE(&s->ext_combiner), 1);
sysbus_mmio_map(busdev, 0, EXYNOS4210_EXT_COMBINER_BASE_ADDR);
/* Initialize board IRQs. */

6
include/hw/arm/exynos4210.h
View File

@ -82,17 +82,11 @@
*/
#define EXYNOS4210_NUM_SPLITTERS (EXYNOS4210_MAX_EXT_COMBINER_IN_IRQ + 38)
typedef struct Exynos4210Irq {
qemu_irq int_combiner_irq[EXYNOS4210_MAX_INT_COMBINER_IN_IRQ];
qemu_irq ext_combiner_irq[EXYNOS4210_MAX_EXT_COMBINER_IN_IRQ];
} Exynos4210Irq;
struct Exynos4210State {
/*< private >*/
SysBusDevice parent_obj;
/*< public >*/
ARMCPU *cpu[EXYNOS4210_NCPUS];
Exynos4210Irq irqs;
qemu_irq irq_table[EXYNOS4210_MAX_INT_COMBINER_IN_IRQ];
MemoryRegion chipid_mem;