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target/loongarch: Prefer fast cpu_env() over slower CPU QOM cast macro 

Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20240129164514.73104-16-philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
[thuth: Adjusted patch for hunk that moved to cpu_helper.c]
Signed-off-by: Thomas Huth <thuth@redhat.com>
This commit is contained in:
Philippe Mathieu-Daudé 2024-01-29 17:44:57 +01:00 committed by Thomas Huth
parent f8436a1605
commit f3b603b95e
5 changed files with 26 additions and 66 deletions
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39
target/loongarch/cpu.c
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@ -91,18 +91,12 @@ void G_NORETURN do_raise_exception(CPULoongArchState *env,
static void loongarch_cpu_set_pc(CPUState *cs, vaddr value) static void loongarch_cpu_set_pc(CPUState *cs, vaddr value)
{ {
LoongArchCPU *cpu = LOONGARCH_CPU(cs); set_pc(cpu_env(cs), value);
CPULoongArchState *env = &cpu->env;
set_pc(env, value);
} }
static vaddr loongarch_cpu_get_pc(CPUState *cs) static vaddr loongarch_cpu_get_pc(CPUState *cs)
{ {
LoongArchCPU *cpu = LOONGARCH_CPU(cs); return cpu_env(cs)->pc;
CPULoongArchState *env = &cpu->env;
return env->pc;
} }
#ifndef CONFIG_USER_ONLY #ifndef CONFIG_USER_ONLY
@ -157,8 +151,7 @@ static inline bool cpu_loongarch_hw_interrupts_pending(CPULoongArchState *env)
#ifndef CONFIG_USER_ONLY #ifndef CONFIG_USER_ONLY
static void loongarch_cpu_do_interrupt(CPUState *cs) static void loongarch_cpu_do_interrupt(CPUState *cs)
{ {
LoongArchCPU *cpu = LOONGARCH_CPU(cs); CPULoongArchState *env = cpu_env(cs);
CPULoongArchState *env = &cpu->env;
bool update_badinstr = 1; bool update_badinstr = 1;
int cause = -1; int cause = -1;
const char *name; const char *name;
@ -308,8 +301,7 @@ static void loongarch_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
MemTxResult response, MemTxResult response,
uintptr_t retaddr) uintptr_t retaddr)
{ {
LoongArchCPU *cpu = LOONGARCH_CPU(cs); CPULoongArchState *env = cpu_env(cs);
CPULoongArchState *env = &cpu->env;
if (access_type == MMU_INST_FETCH) { if (access_type == MMU_INST_FETCH) {
do_raise_exception(env, EXCCODE_ADEF, retaddr); do_raise_exception(env, EXCCODE_ADEF, retaddr);
@ -321,8 +313,7 @@ static void loongarch_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
static bool loongarch_cpu_exec_interrupt(CPUState *cs, int interrupt_request) static bool loongarch_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
{ {
if (interrupt_request & CPU_INTERRUPT_HARD) { if (interrupt_request & CPU_INTERRUPT_HARD) {
LoongArchCPU *cpu = LOONGARCH_CPU(cs); CPULoongArchState *env = cpu_env(cs);
CPULoongArchState *env = &cpu->env;
if (cpu_loongarch_hw_interrupts_enabled(env) && if (cpu_loongarch_hw_interrupts_enabled(env) &&
cpu_loongarch_hw_interrupts_pending(env)) { cpu_loongarch_hw_interrupts_pending(env)) {
@ -339,21 +330,15 @@ static bool loongarch_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
static void loongarch_cpu_synchronize_from_tb(CPUState *cs, static void loongarch_cpu_synchronize_from_tb(CPUState *cs,
const TranslationBlock *tb) const TranslationBlock *tb)
{ {
LoongArchCPU *cpu = LOONGARCH_CPU(cs);
CPULoongArchState *env = &cpu->env;
tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL)); tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL));
set_pc(env, tb->pc); set_pc(cpu_env(cs), tb->pc);
} }
static void loongarch_restore_state_to_opc(CPUState *cs, static void loongarch_restore_state_to_opc(CPUState *cs,
const TranslationBlock *tb, const TranslationBlock *tb,
const uint64_t *data) const uint64_t *data)
{ {
LoongArchCPU *cpu = LOONGARCH_CPU(cs); set_pc(cpu_env(cs), data[0]);
CPULoongArchState *env = &cpu->env;
set_pc(env, data[0]);
} }
#endif /* CONFIG_TCG */ #endif /* CONFIG_TCG */
@ -362,12 +347,10 @@ static bool loongarch_cpu_has_work(CPUState *cs)
#ifdef CONFIG_USER_ONLY #ifdef CONFIG_USER_ONLY
return true; return true;
#else #else
LoongArchCPU *cpu = LOONGARCH_CPU(cs);
CPULoongArchState *env = &cpu->env;
bool has_work = false; bool has_work = false;
if ((cs->interrupt_request & CPU_INTERRUPT_HARD) && if ((cs->interrupt_request & CPU_INTERRUPT_HARD) &&
cpu_loongarch_hw_interrupts_pending(env)) { cpu_loongarch_hw_interrupts_pending(cpu_env(cs))) {
has_work = true; has_work = true;
} }
@ -509,9 +492,8 @@ static void loongarch_max_initfn(Object *obj)
static void loongarch_cpu_reset_hold(Object *obj) static void loongarch_cpu_reset_hold(Object *obj)
{ {
CPUState *cs = CPU(obj); CPUState *cs = CPU(obj);
LoongArchCPU *cpu = LOONGARCH_CPU(cs);
LoongArchCPUClass *lacc = LOONGARCH_CPU_GET_CLASS(obj); LoongArchCPUClass *lacc = LOONGARCH_CPU_GET_CLASS(obj);
CPULoongArchState *env = &cpu->env; CPULoongArchState *env = cpu_env(cs);
if (lacc->parent_phases.hold) { if (lacc->parent_phases.hold) {
lacc->parent_phases.hold(obj); lacc->parent_phases.hold(obj);
@ -694,8 +676,7 @@ static ObjectClass *loongarch_cpu_class_by_name(const char *cpu_model)
void loongarch_cpu_dump_state(CPUState *cs, FILE *f, int flags) void loongarch_cpu_dump_state(CPUState *cs, FILE *f, int flags)
{ {
LoongArchCPU *cpu = LOONGARCH_CPU(cs); CPULoongArchState *env = cpu_env(cs);
CPULoongArchState *env = &cpu->env;
int i; int i;
qemu_fprintf(f, " PC=%016" PRIx64 " ", env->pc); qemu_fprintf(f, " PC=%016" PRIx64 " ", env->pc);

3
target/loongarch/cpu_helper.c
View File

@ -218,8 +218,7 @@ int get_physical_address(CPULoongArchState *env, hwaddr *physical,
hwaddr loongarch_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) hwaddr loongarch_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
{ {
LoongArchCPU *cpu = LOONGARCH_CPU(cs); CPULoongArchState *env = cpu_env(cs);
CPULoongArchState *env = &cpu->env;
hwaddr phys_addr; hwaddr phys_addr;
int prot; int prot;

6
target/loongarch/gdbstub.c
View File

@ -33,8 +33,7 @@ void write_fcc(CPULoongArchState *env, uint64_t val)
int loongarch_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) int loongarch_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{ {
LoongArchCPU *cpu = LOONGARCH_CPU(cs); CPULoongArchState *env = cpu_env(cs);
CPULoongArchState *env = &cpu->env;
uint64_t val; uint64_t val;
if (0 <= n && n < 32) { if (0 <= n && n < 32) {
@ -60,8 +59,7 @@ int loongarch_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
int loongarch_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) int loongarch_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
{ {
LoongArchCPU *cpu = LOONGARCH_CPU(cs); CPULoongArchState *env = cpu_env(cs);
CPULoongArchState *env = &cpu->env;
target_ulong tmp; target_ulong tmp;
int read_length; int read_length;
int length = 0; int length = 0;

41
target/loongarch/kvm/kvm.c
View File

@ -38,8 +38,7 @@ static int kvm_loongarch_get_regs_core(CPUState *cs)
int ret = 0; int ret = 0;
int i; int i;
struct kvm_regs regs; struct kvm_regs regs;
LoongArchCPU *cpu = LOONGARCH_CPU(cs); CPULoongArchState *env = cpu_env(cs);
CPULoongArchState *env = &cpu->env;
/* Get the current register set as KVM seems it */ /* Get the current register set as KVM seems it */
ret = kvm_vcpu_ioctl(cs, KVM_GET_REGS, &regs); ret = kvm_vcpu_ioctl(cs, KVM_GET_REGS, &regs);
@ -62,8 +61,7 @@ static int kvm_loongarch_put_regs_core(CPUState *cs)
int ret = 0; int ret = 0;
int i; int i;
struct kvm_regs regs; struct kvm_regs regs;
LoongArchCPU *cpu = LOONGARCH_CPU(cs); CPULoongArchState *env = cpu_env(cs);
CPULoongArchState *env = &cpu->env;
/* Set the registers based on QEMU's view of things */ /* Set the registers based on QEMU's view of things */
for (i = 0; i < 32; i++) { for (i = 0; i < 32; i++) {
@ -82,8 +80,7 @@ static int kvm_loongarch_put_regs_core(CPUState *cs)
static int kvm_loongarch_get_csr(CPUState *cs) static int kvm_loongarch_get_csr(CPUState *cs)
{ {
int ret = 0; int ret = 0;
LoongArchCPU *cpu = LOONGARCH_CPU(cs); CPULoongArchState *env = cpu_env(cs);
CPULoongArchState *env = &cpu->env;
ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_CRMD), ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_CRMD),
&env->CSR_CRMD); &env->CSR_CRMD);
@ -253,8 +250,7 @@ static int kvm_loongarch_get_csr(CPUState *cs)
static int kvm_loongarch_put_csr(CPUState *cs, int level) static int kvm_loongarch_put_csr(CPUState *cs, int level)
{ {
int ret = 0; int ret = 0;
LoongArchCPU *cpu = LOONGARCH_CPU(cs); CPULoongArchState *env = cpu_env(cs);
CPULoongArchState *env = &cpu->env;
ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_CRMD), ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_CRMD),
&env->CSR_CRMD); &env->CSR_CRMD);
@ -430,9 +426,7 @@ static int kvm_loongarch_get_regs_fp(CPUState *cs)
{ {
int ret, i; int ret, i;
struct kvm_fpu fpu; struct kvm_fpu fpu;
CPULoongArchState *env = cpu_env(cs);
LoongArchCPU *cpu = LOONGARCH_CPU(cs);
CPULoongArchState *env = &cpu->env;
ret = kvm_vcpu_ioctl(cs, KVM_GET_FPU, &fpu); ret = kvm_vcpu_ioctl(cs, KVM_GET_FPU, &fpu);
if (ret < 0) { if (ret < 0) {
@ -456,9 +450,7 @@ static int kvm_loongarch_put_regs_fp(CPUState *cs)
{ {
int ret, i; int ret, i;
struct kvm_fpu fpu; struct kvm_fpu fpu;
CPULoongArchState *env = cpu_env(cs);
LoongArchCPU *cpu = LOONGARCH_CPU(cs);
CPULoongArchState *env = &cpu->env;
fpu.fcsr = env->fcsr0; fpu.fcsr = env->fcsr0;
fpu.fcc = 0; fpu.fcc = 0;
@ -487,8 +479,7 @@ static int kvm_loongarch_get_mpstate(CPUState *cs)
{ {
int ret = 0; int ret = 0;
struct kvm_mp_state mp_state; struct kvm_mp_state mp_state;
LoongArchCPU *cpu = LOONGARCH_CPU(cs); CPULoongArchState *env = cpu_env(cs);
CPULoongArchState *env = &cpu->env;
if (cap_has_mp_state) { if (cap_has_mp_state) {
ret = kvm_vcpu_ioctl(cs, KVM_GET_MP_STATE, &mp_state); ret = kvm_vcpu_ioctl(cs, KVM_GET_MP_STATE, &mp_state);
@ -505,12 +496,8 @@ static int kvm_loongarch_get_mpstate(CPUState *cs)
static int kvm_loongarch_put_mpstate(CPUState *cs) static int kvm_loongarch_put_mpstate(CPUState *cs)
{ {
int ret = 0; int ret = 0;
LoongArchCPU *cpu = LOONGARCH_CPU(cs);
CPULoongArchState *env = &cpu->env;
struct kvm_mp_state mp_state = { struct kvm_mp_state mp_state = {
.mp_state = env->mp_state .mp_state = cpu_env(cs)->mp_state
}; };
if (cap_has_mp_state) { if (cap_has_mp_state) {
@ -527,8 +514,7 @@ static int kvm_loongarch_get_cpucfg(CPUState *cs)
{ {
int i, ret = 0; int i, ret = 0;
uint64_t val; uint64_t val;
LoongArchCPU *cpu = LOONGARCH_CPU(cs); CPULoongArchState *env = cpu_env(cs);
CPULoongArchState *env = &cpu->env;
for (i = 0; i < 21; i++) { for (i = 0; i < 21; i++) {
ret = kvm_get_one_reg(cs, KVM_IOC_CPUCFG(i), &val); ret = kvm_get_one_reg(cs, KVM_IOC_CPUCFG(i), &val);
@ -549,8 +535,7 @@ static int kvm_check_cpucfg2(CPUState *cs)
.attr = 2, .attr = 2,
.addr = (uint64_t)&val, .addr = (uint64_t)&val,
}; };
LoongArchCPU *cpu = LOONGARCH_CPU(cs); CPULoongArchState *env = cpu_env(cs);
CPULoongArchState *env = &cpu->env;
ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr); ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr);
@ -575,8 +560,7 @@ static int kvm_check_cpucfg2(CPUState *cs)
static int kvm_loongarch_put_cpucfg(CPUState *cs) static int kvm_loongarch_put_cpucfg(CPUState *cs)
{ {
int i, ret = 0; int i, ret = 0;
LoongArchCPU *cpu = LOONGARCH_CPU(cs); CPULoongArchState *env = cpu_env(cs);
CPULoongArchState *env = &cpu->env;
uint64_t val; uint64_t val;
for (i = 0; i < 21; i++) { for (i = 0; i < 21; i++) {
@ -758,8 +742,7 @@ bool kvm_arch_cpu_check_are_resettable(void)
int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
{ {
int ret = 0; int ret = 0;
LoongArchCPU *cpu = LOONGARCH_CPU(cs); CPULoongArchState *env = cpu_env(cs);
CPULoongArchState *env = &cpu->env;
MemTxAttrs attrs = {}; MemTxAttrs attrs = {};
attrs.requester_id = env_cpu(env)->cpu_index; attrs.requester_id = env_cpu(env)->cpu_index;

3
target/loongarch/tcg/tlb_helper.c
View File

@ -449,8 +449,7 @@ bool loongarch_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
MMUAccessType access_type, int mmu_idx, MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr) bool probe, uintptr_t retaddr)
{ {
LoongArchCPU *cpu = LOONGARCH_CPU(cs); CPULoongArchState *env = cpu_env(cs);
CPULoongArchState *env = &cpu->env;
hwaddr physical; hwaddr physical;
int prot; int prot;
int ret; int ret;