target/arm: Move GTimer definitions to new 'gtimer.h' header
Move Arm A-class Generic Timer definitions to the new "target/arm/gtimer.h" header so units in hw/ which don't need access to ARMCPU internals can use them without having to include the huge "cpu.h". Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240118200643.29037-20-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -31,6 +31,7 @@
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#include "sysemu/sysemu.h"
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#include "hw/arm/allwinner-h3.h"
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#include "target/arm/cpu-qom.h"
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#include "target/arm/gtimer.h"
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/* Memory map */
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const hwaddr allwinner_h3_memmap[] = {
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@ -34,6 +34,7 @@
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#include "hw/arm/allwinner-r40.h"
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#include "hw/misc/allwinner-r40-dramc.h"
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#include "target/arm/cpu-qom.h"
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#include "target/arm/gtimer.h"
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/* Memory map */
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const hwaddr allwinner_r40_memmap[] = {
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@ -16,6 +16,7 @@
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#include "hw/arm/raspi_platform.h"
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#include "hw/sysbus.h"
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#include "target/arm/cpu-qom.h"
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#include "target/arm/gtimer.h"
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struct BCM283XClass {
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/*< private >*/
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@ -51,6 +51,7 @@
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#include "qapi/qmp/qlist.h"
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#include "qom/object.h"
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#include "target/arm/cpu-qom.h"
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#include "target/arm/gtimer.h"
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#define RAMLIMIT_GB 8192
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#define RAMLIMIT_BYTES (RAMLIMIT_GB * GiB)
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@ -76,6 +76,7 @@
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#include "target/arm/cpu-qom.h"
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#include "target/arm/internals.h"
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#include "target/arm/multiprocessing.h"
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#include "target/arm/gtimer.h"
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#include "hw/mem/pc-dimm.h"
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#include "hw/mem/nvdimm.h"
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#include "hw/acpi/generic_event_device.h"
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@ -24,6 +24,7 @@
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#include "hw/arm/xlnx-versal.h"
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#include "qemu/log.h"
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#include "target/arm/cpu-qom.h"
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#include "target/arm/gtimer.h"
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#define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72")
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#define XLNX_VERSAL_RCPU_TYPE ARM_CPU_TYPE_NAME("cortex-r5f")
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@ -26,6 +26,7 @@
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#include "sysemu/sysemu.h"
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#include "kvm_arm.h"
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#include "target/arm/cpu-qom.h"
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#include "target/arm/gtimer.h"
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#define GIC_NUM_SPI_INTR 160
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@ -26,6 +26,7 @@
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#include "hw/qdev-properties.h"
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#include "sysemu/kvm.h"
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#include "kvm_arm.h"
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#include "target/arm/gtimer.h"
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static void a15mp_priv_set_irq(void *opaque, int irq, int level)
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{
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@ -49,6 +49,7 @@
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#include "fpu/softfloat.h"
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#include "cpregs.h"
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#include "target/arm/cpu-qom.h"
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#include "target/arm/gtimer.h"
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static void arm_cpu_set_pc(CPUState *cs, vaddr value)
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{
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@ -27,6 +27,7 @@
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#include "exec/cpu-defs.h"
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#include "qapi/qapi-types-common.h"
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#include "target/arm/multiprocessing.h"
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#include "target/arm/gtimer.h"
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/* ARM processors have a weak memory model */
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#define TCG_GUEST_DEFAULT_MO (0)
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@ -140,13 +141,6 @@ typedef struct ARMGenericTimer {
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uint64_t ctl; /* Timer Control register */
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} ARMGenericTimer;
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#define GTIMER_PHYS 0
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#define GTIMER_VIRT 1
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#define GTIMER_HYP 2
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#define GTIMER_SEC 3
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#define GTIMER_HYPVIRT 4
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#define NUM_GTIMERS 5
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#define VTCR_NSW (1u << 29)
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#define VTCR_NSA (1u << 30)
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#define VSTCR_SW VTCR_NSW
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21
target/arm/gtimer.h
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21
target/arm/gtimer.h
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@ -0,0 +1,21 @@
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/*
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* ARM generic timer definitions for Arm A-class CPU
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* SPDX-License-Identifier: LGPL-2.1-or-later
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*/
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#ifndef TARGET_ARM_GTIMER_H
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#define TARGET_ARM_GTIMER_H
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enum {
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GTIMER_PHYS = 0,
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GTIMER_VIRT = 1,
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GTIMER_HYP = 2,
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GTIMER_SEC = 3,
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GTIMER_HYPVIRT = 4,
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#define NUM_GTIMERS 5
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};
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#endif
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@ -30,6 +30,7 @@
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#include "semihosting/common-semi.h"
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#endif
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#include "cpregs.h"
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#include "target/arm/gtimer.h"
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#define ARM_CPU_FREQ 1000000000 /* FIXME: 1 GHz, should be configurable */
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@ -29,6 +29,7 @@
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#include "target/arm/cpu.h"
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#include "target/arm/internals.h"
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#include "target/arm/multiprocessing.h"
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#include "target/arm/gtimer.h"
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#include "trace/trace-target_arm_hvf.h"
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#include "migration/vmstate.h"
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@ -38,6 +38,7 @@
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#include "qemu/log.h"
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#include "hw/acpi/acpi.h"
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#include "hw/acpi/ghes.h"
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#include "target/arm/gtimer.h"
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const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
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KVM_CAP_LAST_INFO
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@ -7,6 +7,7 @@
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#include "internals.h"
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#include "cpu-features.h"
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#include "migration/cpu.h"
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#include "target/arm/gtimer.h"
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static bool vfp_needed(void *opaque)
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{
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