cris: improve passing PIC interrupt vector to the CPU
Instead of accessing cpu interrupt vector directly from PIC, send the vector value over the qemu_irq. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
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@ -253,7 +253,6 @@ void axisdev88_init(MachineState *machine)
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const char *kernel_filename = machine->kernel_filename;
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const char *kernel_filename = machine->kernel_filename;
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const char *kernel_cmdline = machine->kernel_cmdline;
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const char *kernel_cmdline = machine->kernel_cmdline;
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CRISCPU *cpu;
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CRISCPU *cpu;
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CPUCRISState *env;
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DeviceState *dev;
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DeviceState *dev;
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SysBusDevice *s;
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SysBusDevice *s;
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DriveInfo *nand;
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DriveInfo *nand;
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@ -267,7 +266,6 @@ void axisdev88_init(MachineState *machine)
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/* init CPUs */
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/* init CPUs */
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cpu = CRIS_CPU(cpu_create(machine->cpu_type));
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cpu = CRIS_CPU(cpu_create(machine->cpu_type));
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env = &cpu->env;
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/* allocate RAM */
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/* allocate RAM */
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memory_region_allocate_system_memory(phys_ram, NULL, "axisdev88.ram",
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memory_region_allocate_system_memory(phys_ram, NULL, "axisdev88.ram",
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@ -297,8 +295,6 @@ void axisdev88_init(MachineState *machine)
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dev = qdev_create(NULL, "etraxfs,pic");
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dev = qdev_create(NULL, "etraxfs,pic");
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/* FIXME: Is there a proper way to signal vectors to the CPU core? */
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qdev_prop_set_ptr(dev, "interrupt_vector", &env->interrupt_vector);
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qdev_init_nofail(dev);
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qdev_init_nofail(dev);
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s = SYS_BUS_DEVICE(dev);
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s = SYS_BUS_DEVICE(dev);
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sysbus_mmio_map(s, 0, 0x3001c000);
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sysbus_mmio_map(s, 0, 0x3001c000);
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@ -27,8 +27,6 @@
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#include "qemu/module.h"
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#include "qemu/module.h"
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#include "hw/irq.h"
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#include "hw/irq.h"
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#include "hw/qdev-properties.h"
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#include "hw/qdev-properties.h"
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//#include "pc.h"
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//#include "etraxfs.h"
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#define D(x)
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#define D(x)
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@ -48,7 +46,6 @@ struct etrax_pic
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SysBusDevice parent_obj;
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SysBusDevice parent_obj;
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MemoryRegion mmio;
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MemoryRegion mmio;
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void *interrupt_vector;
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qemu_irq parent_irq;
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qemu_irq parent_irq;
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qemu_irq parent_nmi;
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qemu_irq parent_nmi;
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uint32_t regs[R_MAX];
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uint32_t regs[R_MAX];
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@ -79,11 +76,7 @@ static void pic_update(struct etrax_pic *fs)
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}
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}
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}
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}
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if (fs->interrupt_vector) {
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qemu_set_irq(fs->parent_irq, vector);
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/* hack alert: ptr property */
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*(uint32_t*)(fs->interrupt_vector) = vector;
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}
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qemu_set_irq(fs->parent_irq, !!vector);
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}
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}
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static uint64_t
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static uint64_t
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@ -163,28 +156,11 @@ static void etraxfs_pic_init(Object *obj)
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sysbus_init_mmio(sbd, &s->mmio);
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sysbus_init_mmio(sbd, &s->mmio);
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}
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}
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static Property etraxfs_pic_properties[] = {
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DEFINE_PROP_PTR("interrupt_vector", struct etrax_pic, interrupt_vector),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void etraxfs_pic_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->props = etraxfs_pic_properties;
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/*
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* Note: pointer property "interrupt_vector" may remain null, thus
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* no need for dc->user_creatable = false;
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*/
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}
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static const TypeInfo etraxfs_pic_info = {
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static const TypeInfo etraxfs_pic_info = {
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.name = TYPE_ETRAX_FS_PIC,
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.name = TYPE_ETRAX_FS_PIC,
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.parent = TYPE_SYS_BUS_DEVICE,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(struct etrax_pic),
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.instance_size = sizeof(struct etrax_pic),
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.instance_init = etraxfs_pic_init,
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.instance_init = etraxfs_pic_init,
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.class_init = etraxfs_pic_class_init,
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};
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};
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static void etraxfs_pic_register_types(void)
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static void etraxfs_pic_register_types(void)
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@ -147,6 +147,14 @@ static void cris_cpu_set_irq(void *opaque, int irq, int level)
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CPUState *cs = CPU(cpu);
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CPUState *cs = CPU(cpu);
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int type = irq == CRIS_CPU_IRQ ? CPU_INTERRUPT_HARD : CPU_INTERRUPT_NMI;
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int type = irq == CRIS_CPU_IRQ ? CPU_INTERRUPT_HARD : CPU_INTERRUPT_NMI;
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if (irq == CRIS_CPU_IRQ) {
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/*
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* The PIC passes us the vector for the IRQ as the value it sends
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* over the qemu_irq line
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*/
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cpu->env.interrupt_vector = level;
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}
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if (level) {
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if (level) {
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cpu_interrupt(cs, type);
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cpu_interrupt(cs, type);
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} else {
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} else {
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@ -34,6 +34,7 @@
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#define CPU_INTERRUPT_NMI CPU_INTERRUPT_TGT_EXT_3
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#define CPU_INTERRUPT_NMI CPU_INTERRUPT_TGT_EXT_3
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/* CRUS CPU device objects interrupt lines. */
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/* CRUS CPU device objects interrupt lines. */
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/* PIC passes the vector for the IRQ as the value of it sends over qemu_irq */
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#define CRIS_CPU_IRQ 0
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#define CRIS_CPU_IRQ 0
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#define CRIS_CPU_NMI 1
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#define CRIS_CPU_NMI 1
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