Merge remote-tracking branch 'sweil/w32' into staging
# By Stefan Weil (10) and others # Via Aurelien Jarno (1) and Stefan Weil (1) * sweil/w32: (27 commits) w32, w64: Add build rule for installer target-mips: fix mipsdsp_mul_q31_q31 mips_malta: fix copy of the 0x1fc00000 region linux-user: correct argument number for sys_mremap and sys_splice target-mips: Remove assignment to a variable which is never used target-mips: fix mipsdsp_trunc16_sat16_round hw/mips: align initrd to 64KB to avoid kernel error pflash_cfi01: duplicate status byte from bits 23:16 for 32bit reads mips_malta: generate SMBUS EEPROM data mips_malta: cap BIOS endian swap length at 0x3e0000 bytes mips_malta: generate SPD EEPROM data at runtime mips_malta: correct reading MIPS revision at 0x1fc00010 mips_malta: fix BIOS endianness swapping mips_malta: QOM cast cleanup target-mips: fix branch in likely delay slot tcg assert target-mips: fix multiplication in mipsdsp_rndq15_mul_q15_q15 target-mips: Remove assignment to a variable which is never used misc: Use g_assert_not_reached for code which is expected to be unreachable qemu-options: mention C-a h in the -nographic doc misc: Fix new typos in comments and strings ... Message-id: 1374989579-24933-1-git-send-email-sw@weilnetz.de Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
Anthony Liguori
commit
f60a0d6ab9
55
Makefile
55
Makefile
|
|
@ -437,6 +437,61 @@ qemu-doc.dvi qemu-doc.html qemu-doc.info qemu-doc.pdf: \
|
|||
qemu-img.texi qemu-nbd.texi qemu-options.texi \
|
||||
qemu-monitor.texi qemu-img-cmds.texi
|
||||
|
||||
ifdef CONFIG_WIN32
|
||||
|
||||
INSTALLER = qemu-setup-$(VERSION)$(EXESUF)
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||||
|
||||
nsisflags = -V2 -NOCD
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||||
|
||||
ifneq ($(wildcard $(SRC_PATH)/dll),)
|
||||
ifeq ($(ARCH),x86_64)
|
||||
# 64 bit executables
|
||||
DLL_PATH = $(SRC_PATH)/dll/w64
|
||||
nsisflags += -DW64
|
||||
else
|
||||
# 32 bit executables
|
||||
DLL_PATH = $(SRC_PATH)/dll/w32
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||||
endif
|
||||
endif
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||||
|
||||
.PHONY: installer
|
||||
installer: $(INSTALLER)
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||||
|
||||
INSTDIR=/tmp/qemu-nsis
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$(INSTALLER): $(SRC_PATH)/qemu.nsi
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make install prefix=${INSTDIR}
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||||
ifdef SIGNCODE
|
||||
(cd ${INSTDIR}; \
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for i in *.exe; do \
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$(SIGNCODE) $${i}; \
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done \
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||||
)
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||||
endif # SIGNCODE
|
||||
(cd ${INSTDIR}; \
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for i in qemu-system-*.exe; do \
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arch=$${i%.exe}; \
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arch=$${arch#qemu-system-}; \
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||||
echo Section \"$$arch\" Section_$$arch; \
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echo SetOutPath \"\$$INSTDIR\"; \
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echo File \"\$${BINDIR}\\$$i\"; \
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echo SectionEnd; \
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||||
done \
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||||
) >${INSTDIR}/system-emulations.nsh
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makensis $(nsisflags) \
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$(if $(BUILD_DOCS),-DCONFIG_DOCUMENTATION="y") \
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$(if $(CONFIG_GTK),-DCONFIG_GTK="y") \
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||||
-DBINDIR="${INSTDIR}" \
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$(if $(DLL_PATH),-DDLLDIR="$(DLL_PATH)") \
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||||
-DSRCDIR="$(SRC_PATH)" \
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-DOUTFILE="$(INSTALLER)" \
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||||
$(SRC_PATH)/qemu.nsi
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rm -r ${INSTDIR}
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ifdef SIGNCODE
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$(SIGNCODE) $(INSTALLER)
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endif # SIGNCODE
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||||
endif # CONFIG_WIN
|
||||
|
||||
# Add a dependency on the generated files, so that they are always
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# rebuilt before other object files
|
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ifneq ($(filter-out %clean,$(MAKECMDGOALS)),$(if $(MAKECMDGOALS),,fail))
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||||
|
|
|
|||
|
|
@ -168,7 +168,7 @@ typedef struct QEMU_PACKED VHDXLogEntryHeader {
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|||
vhdx_header. If not found in
|
||||
vhdx_header, it is invalid */
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||||
uint64_t flushed_file_offset; /* see spec for full details - this
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||||
sould be vhdx file size in bytes */
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||||
should be vhdx file size in bytes */
|
||||
uint64_t last_file_offset; /* size in bytes that all allocated
|
||||
file structures fit into */
|
||||
} VHDXLogEntryHeader;
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||||
|
|
|
|||
|
|
@ -1029,7 +1029,7 @@ static void abort_prepare(BlkTransactionState *common, Error **errp)
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|
||||
static void abort_commit(BlkTransactionState *common)
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||||
{
|
||||
assert(false); /* this action never succeeds */
|
||||
g_assert_not_reached(); /* this action never succeeds */
|
||||
}
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||||
|
||||
static const BdrvActionOps actions[] = {
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||||
|
|
|
|||
2
cpus.c
2
cpus.c
|
|
@ -112,7 +112,7 @@ typedef struct TimersState {
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|||
int64_t dummy;
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||||
} TimersState;
|
||||
|
||||
TimersState timers_state;
|
||||
static TimersState timers_state;
|
||||
|
||||
/* Return the virtual CPU time, based on the instruction counter. */
|
||||
int64_t cpu_get_icount(void)
|
||||
|
|
|
|||
|
|
@ -199,7 +199,7 @@ Version #1 requires that all server implementations of the protocol must
|
|||
check this field and register all requests found in the array of commands located
|
||||
in the data portion and return an equal number of results in the response.
|
||||
The maximum number of repeats is hard-coded to 4096. This is a conservative
|
||||
limit based on the maximum size of a SEND message along with emperical
|
||||
limit based on the maximum size of a SEND message along with empirical
|
||||
observations on the maximum future benefit of simultaneous page registrations.
|
||||
|
||||
The 'type' field has 12 different command values:
|
||||
|
|
|
|||
|
|
@ -1153,10 +1153,12 @@ static int proxy_init(FsContext *ctx)
|
|||
sock_id = atoi(ctx->fs_root);
|
||||
if (sock_id < 0) {
|
||||
fprintf(stderr, "socket descriptor not initialized\n");
|
||||
g_free(proxy);
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
g_free(ctx->fs_root);
|
||||
ctx->fs_root = NULL;
|
||||
|
||||
proxy->in_iovec.iov_base = g_malloc(PROXY_MAX_IO_SZ + PROXY_HDR_SZ);
|
||||
proxy->in_iovec.iov_len = PROXY_MAX_IO_SZ + PROXY_HDR_SZ;
|
||||
|
|
|
|||
|
|
@ -192,6 +192,9 @@ static uint32_t pflash_read (pflash_t *pfl, hwaddr offset,
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|||
case 0xe8: /* Write block */
|
||||
/* Status register read */
|
||||
ret = pfl->status;
|
||||
if (width > 2) {
|
||||
ret |= pfl->status << 16;
|
||||
}
|
||||
DPRINTF("%s: status %x\n", __func__, ret);
|
||||
break;
|
||||
case 0x90:
|
||||
|
|
|
|||
|
|
@ -131,7 +131,7 @@ static void pmac_ide_atapi_transfer_cb(void *opaque, int ret)
|
|||
int sector_num = (s->lba << 2) + (s->io_buffer_index >> 9);
|
||||
int nsector = io->len >> 9;
|
||||
|
||||
MACIO_DPRINTF("precopying unaligned %d bytes to %#lx\n",
|
||||
MACIO_DPRINTF("precopying unaligned %d bytes to %#" HWADDR_PRIx "\n",
|
||||
unaligned, io->addr + io->len - unaligned);
|
||||
|
||||
bdrv_read(s->bs, sector_num + nsector, io->remainder, 1);
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||||
|
|
@ -212,14 +212,15 @@ static void pmac_ide_transfer_cb(void *opaque, int ret)
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|||
s->nsector -= n;
|
||||
}
|
||||
|
||||
MACIO_DPRINTF("remainder: %d io->len: %d nsector: %d sector_num: %ld\n",
|
||||
MACIO_DPRINTF("remainder: %d io->len: %d nsector: %d "
|
||||
"sector_num: %" PRId64 "\n",
|
||||
io->remainder_len, io->len, s->nsector, sector_num);
|
||||
if (io->remainder_len && io->len) {
|
||||
/* guest wants the rest of its previous transfer */
|
||||
int remainder_len = MIN(io->remainder_len, io->len);
|
||||
uint8_t *p = &io->remainder[0x200 - remainder_len];
|
||||
|
||||
MACIO_DPRINTF("copying remainder %d bytes at %#lx\n",
|
||||
MACIO_DPRINTF("copying remainder %d bytes at %#" HWADDR_PRIx "\n",
|
||||
remainder_len, io->addr);
|
||||
|
||||
switch (s->dma_cmd) {
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||||
|
|
@ -261,7 +262,7 @@ static void pmac_ide_transfer_cb(void *opaque, int ret)
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|||
if (unaligned) {
|
||||
int nsector = io->len >> 9;
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||||
|
||||
MACIO_DPRINTF("precopying unaligned %d bytes to %#lx\n",
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||||
MACIO_DPRINTF("precopying unaligned %d bytes to %#" HWADDR_PRIx "\n",
|
||||
unaligned, io->addr + io->len - unaligned);
|
||||
|
||||
switch (s->dma_cmd) {
|
||||
|
|
|
|||
|
|
@ -126,7 +126,7 @@ static int64_t load_kernel (CPUMIPSState *env)
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|||
if (loaderparams.initrd_filename) {
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||||
initrd_size = get_image_size (loaderparams.initrd_filename);
|
||||
if (initrd_size > 0) {
|
||||
initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
|
||||
initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK;
|
||||
if (initrd_offset + initrd_size > ram_size) {
|
||||
fprintf(stderr,
|
||||
"qemu: memory too small for initial ram disk '%s'\n",
|
||||
|
|
|
|||
|
|
@ -47,6 +47,7 @@
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|||
#include "sysemu/blockdev.h"
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||||
#include "exec/address-spaces.h"
|
||||
#include "hw/sysbus.h" /* SysBusDevice */
|
||||
#include "qemu/host-utils.h"
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||||
|
||||
//#define DEBUG_BOARD_INIT
|
||||
|
||||
|
|
@ -79,8 +80,12 @@ typedef struct {
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|||
SerialState *uart;
|
||||
} MaltaFPGAState;
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||||
|
||||
#define TYPE_MIPS_MALTA "mips-malta"
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||||
#define MIPS_MALTA(obj) OBJECT_CHECK(MaltaState, (obj), TYPE_MIPS_MALTA)
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|
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typedef struct {
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SysBusDevice busdev;
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SysBusDevice parent_obj;
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||||
|
||||
qemu_irq *i8259;
|
||||
} MaltaState;
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||||
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|
@ -144,12 +149,12 @@ struct _eeprom24c0x_t {
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|||
|
||||
typedef struct _eeprom24c0x_t eeprom24c0x_t;
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|
||||
static eeprom24c0x_t eeprom = {
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static eeprom24c0x_t spd_eeprom = {
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||||
.contents = {
|
||||
/* 00000000: */ 0x80,0x08,0x04,0x0D,0x0A,0x01,0x40,0x00,
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/* 00000000: */ 0x80,0x08,0xFF,0x0D,0x0A,0xFF,0x40,0x00,
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/* 00000008: */ 0x01,0x75,0x54,0x00,0x82,0x08,0x00,0x01,
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||||
/* 00000010: */ 0x8F,0x04,0x02,0x01,0x01,0x00,0x0E,0x00,
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/* 00000018: */ 0x00,0x00,0x00,0x14,0x0F,0x14,0x2D,0x40,
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/* 00000010: */ 0x8F,0x04,0x02,0x01,0x01,0x00,0x00,0x00,
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||||
/* 00000018: */ 0x00,0x00,0x00,0x14,0x0F,0x14,0x2D,0xFF,
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/* 00000020: */ 0x15,0x08,0x15,0x08,0x00,0x00,0x00,0x00,
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/* 00000028: */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
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/* 00000030: */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
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|
@ -165,69 +170,157 @@ static eeprom24c0x_t eeprom = {
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},
|
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};
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||||
|
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static uint8_t eeprom24c0x_read(void)
|
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static void generate_eeprom_spd(uint8_t *eeprom, ram_addr_t ram_size)
|
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{
|
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logout("%u: scl = %u, sda = %u, data = 0x%02x\n",
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eeprom.tick, eeprom.scl, eeprom.sda, eeprom.data);
|
||||
return eeprom.sda;
|
||||
enum { SDR = 0x4, DDR2 = 0x8 } type;
|
||||
uint8_t *spd = spd_eeprom.contents;
|
||||
uint8_t nbanks = 0;
|
||||
uint16_t density = 0;
|
||||
int i;
|
||||
|
||||
/* work in terms of MB */
|
||||
ram_size >>= 20;
|
||||
|
||||
while ((ram_size >= 4) && (nbanks <= 2)) {
|
||||
int sz_log2 = MIN(31 - clz32(ram_size), 14);
|
||||
nbanks++;
|
||||
density |= 1 << (sz_log2 - 2);
|
||||
ram_size -= 1 << sz_log2;
|
||||
}
|
||||
|
||||
/* split to 2 banks if possible */
|
||||
if ((nbanks == 1) && (density > 1)) {
|
||||
nbanks++;
|
||||
density >>= 1;
|
||||
}
|
||||
|
||||
if (density & 0xff00) {
|
||||
density = (density & 0xe0) | ((density >> 8) & 0x1f);
|
||||
type = DDR2;
|
||||
} else if (!(density & 0x1f)) {
|
||||
type = DDR2;
|
||||
} else {
|
||||
type = SDR;
|
||||
}
|
||||
|
||||
if (ram_size) {
|
||||
fprintf(stderr, "Warning: SPD cannot represent final %dMB"
|
||||
" of SDRAM\n", (int)ram_size);
|
||||
}
|
||||
|
||||
/* fill in SPD memory information */
|
||||
spd[2] = type;
|
||||
spd[5] = nbanks;
|
||||
spd[31] = density;
|
||||
|
||||
/* checksum */
|
||||
spd[63] = 0;
|
||||
for (i = 0; i < 63; i++) {
|
||||
spd[63] += spd[i];
|
||||
}
|
||||
|
||||
/* copy for SMBUS */
|
||||
memcpy(eeprom, spd, sizeof(spd_eeprom.contents));
|
||||
}
|
||||
|
||||
static void eeprom24c0x_write(int scl, int sda)
|
||||
static void generate_eeprom_serial(uint8_t *eeprom)
|
||||
{
|
||||
if (eeprom.scl && scl && (eeprom.sda != sda)) {
|
||||
int i, pos = 0;
|
||||
uint8_t mac[6] = { 0x00 };
|
||||
uint8_t sn[5] = { 0x01, 0x23, 0x45, 0x67, 0x89 };
|
||||
|
||||
/* version */
|
||||
eeprom[pos++] = 0x01;
|
||||
|
||||
/* count */
|
||||
eeprom[pos++] = 0x02;
|
||||
|
||||
/* MAC address */
|
||||
eeprom[pos++] = 0x01; /* MAC */
|
||||
eeprom[pos++] = 0x06; /* length */
|
||||
memcpy(&eeprom[pos], mac, sizeof(mac));
|
||||
pos += sizeof(mac);
|
||||
|
||||
/* serial number */
|
||||
eeprom[pos++] = 0x02; /* serial */
|
||||
eeprom[pos++] = 0x05; /* length */
|
||||
memcpy(&eeprom[pos], sn, sizeof(sn));
|
||||
pos += sizeof(sn);
|
||||
|
||||
/* checksum */
|
||||
eeprom[pos] = 0;
|
||||
for (i = 0; i < pos; i++) {
|
||||
eeprom[pos] += eeprom[i];
|
||||
}
|
||||
}
|
||||
|
||||
static uint8_t eeprom24c0x_read(eeprom24c0x_t *eeprom)
|
||||
{
|
||||
logout("%u: scl = %u, sda = %u, data = 0x%02x\n",
|
||||
eeprom->tick, eeprom->scl, eeprom->sda, eeprom->data);
|
||||
return eeprom->sda;
|
||||
}
|
||||
|
||||
static void eeprom24c0x_write(eeprom24c0x_t *eeprom, int scl, int sda)
|
||||
{
|
||||
if (eeprom->scl && scl && (eeprom->sda != sda)) {
|
||||
logout("%u: scl = %u->%u, sda = %u->%u i2c %s\n",
|
||||
eeprom.tick, eeprom.scl, scl, eeprom.sda, sda, sda ? "stop" : "start");
|
||||
eeprom->tick, eeprom->scl, scl, eeprom->sda, sda,
|
||||
sda ? "stop" : "start");
|
||||
if (!sda) {
|
||||
eeprom.tick = 1;
|
||||
eeprom.command = 0;
|
||||
eeprom->tick = 1;
|
||||
eeprom->command = 0;
|
||||
}
|
||||
} else if (eeprom.tick == 0 && !eeprom.ack) {
|
||||
} else if (eeprom->tick == 0 && !eeprom->ack) {
|
||||
/* Waiting for start. */
|
||||
logout("%u: scl = %u->%u, sda = %u->%u wait for i2c start\n",
|
||||
eeprom.tick, eeprom.scl, scl, eeprom.sda, sda);
|
||||
} else if (!eeprom.scl && scl) {
|
||||
eeprom->tick, eeprom->scl, scl, eeprom->sda, sda);
|
||||
} else if (!eeprom->scl && scl) {
|
||||
logout("%u: scl = %u->%u, sda = %u->%u trigger bit\n",
|
||||
eeprom.tick, eeprom.scl, scl, eeprom.sda, sda);
|
||||
if (eeprom.ack) {
|
||||
eeprom->tick, eeprom->scl, scl, eeprom->sda, sda);
|
||||
if (eeprom->ack) {
|
||||
logout("\ti2c ack bit = 0\n");
|
||||
sda = 0;
|
||||
eeprom.ack = 0;
|
||||
} else if (eeprom.sda == sda) {
|
||||
eeprom->ack = 0;
|
||||
} else if (eeprom->sda == sda) {
|
||||
uint8_t bit = (sda != 0);
|
||||
logout("\ti2c bit = %d\n", bit);
|
||||
if (eeprom.tick < 9) {
|
||||
eeprom.command <<= 1;
|
||||
eeprom.command += bit;
|
||||
eeprom.tick++;
|
||||
if (eeprom.tick == 9) {
|
||||
logout("\tcommand 0x%04x, %s\n", eeprom.command, bit ? "read" : "write");
|
||||
eeprom.ack = 1;
|
||||
if (eeprom->tick < 9) {
|
||||
eeprom->command <<= 1;
|
||||
eeprom->command += bit;
|
||||
eeprom->tick++;
|
||||
if (eeprom->tick == 9) {
|
||||
logout("\tcommand 0x%04x, %s\n", eeprom->command,
|
||||
bit ? "read" : "write");
|
||||
eeprom->ack = 1;
|
||||
}
|
||||
} else if (eeprom.tick < 17) {
|
||||
if (eeprom.command & 1) {
|
||||
sda = ((eeprom.data & 0x80) != 0);
|
||||
} else if (eeprom->tick < 17) {
|
||||
if (eeprom->command & 1) {
|
||||
sda = ((eeprom->data & 0x80) != 0);
|
||||
}
|
||||
eeprom.address <<= 1;
|
||||
eeprom.address += bit;
|
||||
eeprom.tick++;
|
||||
eeprom.data <<= 1;
|
||||
if (eeprom.tick == 17) {
|
||||
eeprom.data = eeprom.contents[eeprom.address];
|
||||
logout("\taddress 0x%04x, data 0x%02x\n", eeprom.address, eeprom.data);
|
||||
eeprom.ack = 1;
|
||||
eeprom.tick = 0;
|
||||
eeprom->address <<= 1;
|
||||
eeprom->address += bit;
|
||||
eeprom->tick++;
|
||||
eeprom->data <<= 1;
|
||||
if (eeprom->tick == 17) {
|
||||
eeprom->data = eeprom->contents[eeprom->address];
|
||||
logout("\taddress 0x%04x, data 0x%02x\n",
|
||||
eeprom->address, eeprom->data);
|
||||
eeprom->ack = 1;
|
||||
eeprom->tick = 0;
|
||||
}
|
||||
} else if (eeprom.tick >= 17) {
|
||||
} else if (eeprom->tick >= 17) {
|
||||
sda = 0;
|
||||
}
|
||||
} else {
|
||||
logout("\tsda changed with raising scl\n");
|
||||
}
|
||||
} else {
|
||||
logout("%u: scl = %u->%u, sda = %u->%u\n", eeprom.tick, eeprom.scl, scl, eeprom.sda, sda);
|
||||
logout("%u: scl = %u->%u, sda = %u->%u\n", eeprom->tick, eeprom->scl,
|
||||
scl, eeprom->sda, sda);
|
||||
}
|
||||
eeprom.scl = scl;
|
||||
eeprom.sda = sda;
|
||||
eeprom->scl = scl;
|
||||
eeprom->sda = sda;
|
||||
}
|
||||
|
||||
static uint64_t malta_fpga_read(void *opaque, hwaddr addr,
|
||||
|
|
@ -290,7 +383,7 @@ static uint64_t malta_fpga_read(void *opaque, hwaddr addr,
|
|||
|
||||
/* I2CINP Register */
|
||||
case 0x00b00:
|
||||
val = ((s->i2cin & ~1) | eeprom24c0x_read());
|
||||
val = ((s->i2cin & ~1) | eeprom24c0x_read(&spd_eeprom));
|
||||
break;
|
||||
|
||||
/* I2COE Register */
|
||||
|
|
@ -386,7 +479,7 @@ static void malta_fpga_write(void *opaque, hwaddr addr,
|
|||
|
||||
/* I2COUT Register */
|
||||
case 0x00b10:
|
||||
eeprom24c0x_write(val & 0x02, val & 0x01);
|
||||
eeprom24c0x_write(&spd_eeprom, val & 0x02, val & 0x01);
|
||||
s->i2cout = val;
|
||||
break;
|
||||
|
||||
|
|
@ -699,7 +792,7 @@ static int64_t load_kernel (void)
|
|||
if (loaderparams.initrd_filename) {
|
||||
initrd_size = get_image_size (loaderparams.initrd_filename);
|
||||
if (initrd_size > 0) {
|
||||
initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
|
||||
initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK;
|
||||
if (initrd_offset + initrd_size > ram_size) {
|
||||
fprintf(stderr,
|
||||
"qemu: memory too small for initial ram disk '%s'\n",
|
||||
|
|
@ -789,8 +882,10 @@ void mips_malta_init(QEMUMachineInitArgs *args)
|
|||
pflash_t *fl;
|
||||
MemoryRegion *system_memory = get_system_memory();
|
||||
MemoryRegion *ram = g_new(MemoryRegion, 1);
|
||||
MemoryRegion *bios, *bios_alias = g_new(MemoryRegion, 1);
|
||||
MemoryRegion *bios, *bios_copy = g_new(MemoryRegion, 1);
|
||||
target_long bios_size = FLASH_SIZE;
|
||||
const size_t smbus_eeprom_size = 8 * 256;
|
||||
uint8_t *smbus_eeprom_buf = g_malloc0(smbus_eeprom_size);
|
||||
int64_t kernel_entry;
|
||||
PCIBus *pci_bus;
|
||||
ISABus *isa_bus;
|
||||
|
|
@ -808,8 +903,8 @@ void mips_malta_init(QEMUMachineInitArgs *args)
|
|||
int fl_sectors = bios_size >> 16;
|
||||
int be;
|
||||
|
||||
DeviceState *dev = qdev_create(NULL, "mips-malta");
|
||||
MaltaState *s = DO_UPCAST(MaltaState, busdev.qdev, dev);
|
||||
DeviceState *dev = qdev_create(NULL, TYPE_MIPS_MALTA);
|
||||
MaltaState *s = MIPS_MALTA(dev);
|
||||
|
||||
qdev_init_nofail(dev);
|
||||
|
||||
|
|
@ -858,6 +953,10 @@ void mips_malta_init(QEMUMachineInitArgs *args)
|
|||
vmstate_register_ram_global(ram);
|
||||
memory_region_add_subregion(system_memory, 0, ram);
|
||||
|
||||
/* generate SPD EEPROM data */
|
||||
generate_eeprom_spd(&smbus_eeprom_buf[0 * 256], ram_size);
|
||||
generate_eeprom_serial(&smbus_eeprom_buf[6 * 256]);
|
||||
|
||||
#ifdef TARGET_WORDS_BIGENDIAN
|
||||
be = 1;
|
||||
#else
|
||||
|
|
@ -916,8 +1015,11 @@ void mips_malta_init(QEMUMachineInitArgs *args)
|
|||
a neat trick which allows bi-endian firmware. */
|
||||
#ifndef TARGET_WORDS_BIGENDIAN
|
||||
{
|
||||
uint32_t *addr = memory_region_get_ram_ptr(bios);
|
||||
uint32_t *end = addr + bios_size;
|
||||
uint32_t *end, *addr = rom_ptr(FLASH_ADDRESS);
|
||||
if (!addr) {
|
||||
addr = memory_region_get_ram_ptr(bios);
|
||||
}
|
||||
end = (void *)addr + MIN(bios_size, 0x3e0000);
|
||||
while (addr < end) {
|
||||
bswap32s(addr);
|
||||
addr++;
|
||||
|
|
@ -926,14 +1028,23 @@ void mips_malta_init(QEMUMachineInitArgs *args)
|
|||
#endif
|
||||
}
|
||||
|
||||
/* Map the BIOS at a 2nd physical location, as on the real board. */
|
||||
memory_region_init_alias(bios_alias, NULL, "bios.1fc", bios, 0, BIOS_SIZE);
|
||||
memory_region_add_subregion(system_memory, RESET_ADDRESS, bios_alias);
|
||||
/*
|
||||
* Map the BIOS at a 2nd physical location, as on the real board.
|
||||
* Copy it so that we can patch in the MIPS revision, which cannot be
|
||||
* handled by an overlapping region as the resulting ROM code subpage
|
||||
* regions are not executable.
|
||||
*/
|
||||
memory_region_init_ram(bios_copy, NULL, "bios.1fc", BIOS_SIZE);
|
||||
if (!rom_copy(memory_region_get_ram_ptr(bios_copy),
|
||||
FLASH_ADDRESS, BIOS_SIZE)) {
|
||||
memcpy(memory_region_get_ram_ptr(bios_copy),
|
||||
memory_region_get_ram_ptr(bios), BIOS_SIZE);
|
||||
}
|
||||
memory_region_set_readonly(bios_copy, true);
|
||||
memory_region_add_subregion(system_memory, RESET_ADDRESS, bios_copy);
|
||||
|
||||
/* Board ID = 0x420 (Malta Board with CoreLV)
|
||||
XXX: theoretically 0x1e000010 should map to flash and 0x1fc00010 should
|
||||
map to the board ID. */
|
||||
stl_p(memory_region_get_ram_ptr(bios) + 0x10, 0x00000420);
|
||||
/* Board ID = 0x420 (Malta Board with CoreLV) */
|
||||
stl_p(memory_region_get_ram_ptr(bios_copy) + 0x10, 0x00000420);
|
||||
|
||||
/* Init internal devices */
|
||||
cpu_mips_irq_init_cpu(env);
|
||||
|
|
@ -965,8 +1076,8 @@ void mips_malta_init(QEMUMachineInitArgs *args)
|
|||
pci_create_simple(pci_bus, piix4_devfn + 2, "piix4-usb-uhci");
|
||||
smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100,
|
||||
isa_get_irq(NULL, 9), NULL, 0, NULL);
|
||||
/* TODO: Populate SPD eeprom data. */
|
||||
smbus_eeprom_init(smbus, 8, NULL, 0);
|
||||
smbus_eeprom_init(smbus, 8, smbus_eeprom_buf, smbus_eeprom_size);
|
||||
g_free(smbus_eeprom_buf);
|
||||
pit = pit_init(isa_bus, 0x40, 0, NULL);
|
||||
cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
|
||||
DMA_init(0, cpu_exit_irq);
|
||||
|
|
@ -1004,7 +1115,7 @@ static void mips_malta_class_init(ObjectClass *klass, void *data)
|
|||
}
|
||||
|
||||
static const TypeInfo mips_malta_device = {
|
||||
.name = "mips-malta",
|
||||
.name = TYPE_MIPS_MALTA,
|
||||
.parent = TYPE_SYS_BUS_DEVICE,
|
||||
.instance_size = sizeof(MaltaState),
|
||||
.class_init = mips_malta_class_init,
|
||||
|
|
|
|||
|
|
@ -83,7 +83,7 @@ static int64_t load_kernel(void)
|
|||
if (loaderparams.initrd_filename) {
|
||||
initrd_size = get_image_size (loaderparams.initrd_filename);
|
||||
if (initrd_size > 0) {
|
||||
initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
|
||||
initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK;
|
||||
if (initrd_offset + initrd_size > loaderparams.ram_size) {
|
||||
fprintf(stderr,
|
||||
"qemu: memory too small for initial ram disk '%s'\n",
|
||||
|
|
|
|||
|
|
@ -102,7 +102,7 @@ static int64_t load_kernel(void)
|
|||
if (loaderparams.initrd_filename) {
|
||||
initrd_size = get_image_size (loaderparams.initrd_filename);
|
||||
if (initrd_size > 0) {
|
||||
initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
|
||||
initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK;
|
||||
if (initrd_offset + initrd_size > ram_size) {
|
||||
fprintf(stderr,
|
||||
"qemu: memory too small for initial ram disk '%s'\n",
|
||||
|
|
|
|||
|
|
@ -528,7 +528,7 @@ vmxnet3_setup_tx_offloads(VMXNET3State *s)
|
|||
break;
|
||||
|
||||
default:
|
||||
assert(false);
|
||||
g_assert_not_reached();
|
||||
return false;
|
||||
}
|
||||
|
||||
|
|
@ -575,7 +575,7 @@ vmxnet3_on_tx_done_update_stats(VMXNET3State *s, int qidx,
|
|||
stats->ucastBytesTxOK += tot_len;
|
||||
break;
|
||||
default:
|
||||
assert(false);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
if (s->offload_mode == VMXNET3_OM_TSO) {
|
||||
|
|
@ -599,7 +599,7 @@ vmxnet3_on_tx_done_update_stats(VMXNET3State *s, int qidx,
|
|||
break;
|
||||
|
||||
default:
|
||||
assert(false);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -634,7 +634,7 @@ vmxnet3_on_rx_done_update_stats(VMXNET3State *s,
|
|||
stats->ucastBytesRxOK += tot_len;
|
||||
break;
|
||||
default:
|
||||
assert(false);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
if (tot_len > s->mtu) {
|
||||
|
|
@ -643,7 +643,7 @@ vmxnet3_on_rx_done_update_stats(VMXNET3State *s,
|
|||
}
|
||||
break;
|
||||
default:
|
||||
assert(false);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1106,7 +1106,7 @@ vmxnet3_io_bar0_read(void *opaque, hwaddr addr, unsigned size)
|
|||
{
|
||||
if (VMW_IS_MULTIREG_ADDR(addr, VMXNET3_REG_IMR,
|
||||
VMXNET3_MAX_INTRS, VMXNET3_REG_ALIGN)) {
|
||||
assert(false);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
VMW_CBPRN("BAR0 unknown read [%" PRIx64 "], size %d", addr, size);
|
||||
|
|
@ -1651,7 +1651,7 @@ vmxnet3_io_bar1_write(void *opaque,
|
|||
case VMXNET3_REG_ICR:
|
||||
VMW_CBPRN("Write BAR1 [VMXNET3_REG_ICR] = %" PRIx64 ", size %d",
|
||||
val, size);
|
||||
assert(false);
|
||||
g_assert_not_reached();
|
||||
break;
|
||||
|
||||
/* Event Cause Register */
|
||||
|
|
@ -1801,7 +1801,7 @@ vmxnet3_rx_filter_may_indicate(VMXNET3State *s, const void *data,
|
|||
break;
|
||||
|
||||
default:
|
||||
assert(false);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
return true;
|
||||
|
|
|
|||
|
|
@ -287,7 +287,7 @@ void vmxnet_tx_pkt_build_vheader(struct VmxnetTxPkt *pkt, bool tso_enable,
|
|||
break;
|
||||
|
||||
default:
|
||||
assert(false);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
if (csum_enable) {
|
||||
|
|
|
|||
|
|
@ -1357,7 +1357,7 @@ static void ehci_execute_complete(EHCIQueue *q)
|
|||
default:
|
||||
/* should not be triggerable */
|
||||
fprintf(stderr, "USB invalid response %d\n", p->packet.status);
|
||||
assert(0);
|
||||
g_assert_not_reached();
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -2142,7 +2142,7 @@ static void ehci_advance_state(EHCIState *ehci, int async)
|
|||
default:
|
||||
fprintf(stderr, "Bad state!\n");
|
||||
again = -1;
|
||||
assert(0);
|
||||
g_assert_not_reached();
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -2206,7 +2206,7 @@ static void ehci_advance_async_state(EHCIState *ehci)
|
|||
/* this should only be due to a developer mistake */
|
||||
fprintf(stderr, "ehci: Bad asynchronous state %d. "
|
||||
"Resetting to active\n", ehci->astate);
|
||||
assert(0);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -2256,7 +2256,7 @@ static void ehci_advance_periodic_state(EHCIState *ehci)
|
|||
/* this should only be due to a developer mistake */
|
||||
fprintf(stderr, "ehci: Bad periodic state %d. "
|
||||
"Resetting to active\n", ehci->pstate);
|
||||
assert(0);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -53,8 +53,8 @@ static const char *balloon_stat_names[] = {
|
|||
/*
|
||||
* reset_stats - Mark all items in the stats array as unset
|
||||
*
|
||||
* This function needs to be called at device intialization and before
|
||||
* before updating to a set of newly-generated stats. This will ensure that no
|
||||
* This function needs to be called at device initialization and before
|
||||
* updating to a set of newly-generated stats. This will ensure that no
|
||||
* stale values stick around in case the guest reports a subset of the supported
|
||||
* statistics.
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -128,7 +128,6 @@ void watchdog_perform_action(void)
|
|||
case WDT_POWEROFF: /* same as 'quit' command in monitor */
|
||||
watchdog_mon_event("poweroff");
|
||||
exit(0);
|
||||
break;
|
||||
|
||||
case WDT_PAUSE: /* same as 'stop' command in monitor */
|
||||
watchdog_mon_event("pause");
|
||||
|
|
|
|||
|
|
@ -756,7 +756,8 @@ static int xen_pt_initfn(PCIDevice *d)
|
|||
out:
|
||||
memory_listener_register(&s->memory_listener, &address_space_memory);
|
||||
memory_listener_register(&s->io_listener, &address_space_io);
|
||||
XEN_PT_LOG(d, "Real physical device %02x:%02x.%d registered successfuly!\n",
|
||||
XEN_PT_LOG(d,
|
||||
"Real physical device %02x:%02x.%d registered successfully!\n",
|
||||
s->hostaddr.bus, s->hostaddr.slot, s->hostaddr.function);
|
||||
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -36,7 +36,6 @@
|
|||
#pragma GCC poison TARGET_PAGE_ALIGN
|
||||
|
||||
#pragma GCC poison CPUArchState
|
||||
#pragma GCC poison env
|
||||
|
||||
#pragma GCC poison lduw_phys
|
||||
#pragma GCC poison ldl_phys
|
||||
|
|
|
|||
|
|
@ -2,6 +2,9 @@
|
|||
#define HW_MIPS_H
|
||||
/* Definitions for mips board emulation. */
|
||||
|
||||
/* Kernels can be configured with 64KB pages */
|
||||
#define INITRD_PAGE_MASK (~((1 << 16) - 1))
|
||||
|
||||
#include "exec/memory.h"
|
||||
|
||||
/* gt64xxx.c */
|
||||
|
|
|
|||
|
|
@ -1920,7 +1920,7 @@ static const uint8_t mips_syscall_args[] = {
|
|||
MIPS_SYS(sys_sched_get_priority_min, 1)
|
||||
MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
|
||||
MIPS_SYS(sys_nanosleep, 2)
|
||||
MIPS_SYS(sys_mremap , 4)
|
||||
MIPS_SYS(sys_mremap , 5)
|
||||
MIPS_SYS(sys_accept , 3)
|
||||
MIPS_SYS(sys_bind , 3)
|
||||
MIPS_SYS(sys_connect , 3) /* 4170 */
|
||||
|
|
@ -2057,7 +2057,7 @@ static const uint8_t mips_syscall_args[] = {
|
|||
MIPS_SYS(sys_pselect6, 6)
|
||||
MIPS_SYS(sys_ppoll, 5)
|
||||
MIPS_SYS(sys_unshare, 1)
|
||||
MIPS_SYS(sys_splice, 4)
|
||||
MIPS_SYS(sys_splice, 6)
|
||||
MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
|
||||
MIPS_SYS(sys_tee, 4)
|
||||
MIPS_SYS(sys_vmsplice, 4)
|
||||
|
|
|
|||
|
|
@ -2494,7 +2494,7 @@ static int qemu_rdma_close(void *opaque)
|
|||
* @size == 0 :
|
||||
* A 'hint' or 'advice' that means that we wish to speculatively
|
||||
* and asynchronously unregister this memory. In this case, there is no
|
||||
* gaurantee that the unregister will actually happen, for example,
|
||||
* guarantee that the unregister will actually happen, for example,
|
||||
* if the memory is being actively transmitted. Additionally, the memory
|
||||
* may be re-registered at any future time if a write within the same
|
||||
* chunk was requested again, even if you attempted to unregister it
|
||||
|
|
@ -2570,7 +2570,7 @@ static size_t qemu_rdma_save_page(QEMUFile *f, void *opaque,
|
|||
qemu_rdma_signal_unregister(rdma, index, chunk, 0);
|
||||
|
||||
/*
|
||||
* TODO: Synchronous, gauranteed unregistration (should not occur during
|
||||
* TODO: Synchronous, guaranteed unregistration (should not occur during
|
||||
* fast-path). Otherwise, unregisters will process on the next call to
|
||||
* qemu_rdma_drain_cq()
|
||||
if (size < 0) {
|
||||
|
|
|
|||
|
|
@ -73,7 +73,7 @@ eth_get_gso_type(uint16_t l3_proto, uint8_t *l3_hdr, uint8_t l4proto)
|
|||
}
|
||||
|
||||
/* Unsupported offload */
|
||||
assert(false);
|
||||
g_assert_not_reached();
|
||||
|
||||
return VIRTIO_NET_HDR_GSO_NONE | ecn_state;
|
||||
}
|
||||
|
|
|
|||
Binary file not shown.
|
After Width: | Height: | Size: 151 KiB |
Binary file not shown.
|
After Width: | Height: | Size: 4.7 KiB |
|
|
@ -360,7 +360,7 @@ static BusState *qbus_find(const char *path)
|
|||
|
||||
/* find device */
|
||||
if (sscanf(path+pos, "%127[^/]%n", elem, &len) != 1) {
|
||||
assert(0);
|
||||
g_assert_not_reached();
|
||||
elem[0] = len = 0;
|
||||
}
|
||||
pos += len;
|
||||
|
|
@ -397,7 +397,7 @@ static BusState *qbus_find(const char *path)
|
|||
|
||||
/* find bus */
|
||||
if (sscanf(path+pos, "%127[^/]%n", elem, &len) != 1) {
|
||||
assert(0);
|
||||
g_assert_not_reached();
|
||||
elem[0] = len = 0;
|
||||
}
|
||||
pos += len;
|
||||
|
|
|
|||
|
|
@ -844,7 +844,8 @@ you can totally disable graphical output so that QEMU is a simple
|
|||
command line application. The emulated serial port is redirected on
|
||||
the console and muxed with the monitor (unless redirected elsewhere
|
||||
explicitly). Therefore, you can still use QEMU to debug a Linux kernel
|
||||
with a serial console.
|
||||
with a serial console. Use @key{C-a h} for help on switching between
|
||||
the console and monitor.
|
||||
ETEXI
|
||||
|
||||
DEF("curses", 0, QEMU_OPTION_curses,
|
||||
|
|
|
|||
|
|
@ -0,0 +1,250 @@
|
|||
;!/usr/bin/makensis
|
||||
|
||||
; This NSIS script creates an installer for QEMU on Windows.
|
||||
|
||||
; Copyright (C) 2006-2012 Stefan Weil
|
||||
;
|
||||
; This program is free software: you can redistribute it and/or modify
|
||||
; it under the terms of the GNU General Public License as published by
|
||||
; the Free Software Foundation, either version 2 of the License, or
|
||||
; (at your option) version 3 or any later version.
|
||||
;
|
||||
; This program is distributed in the hope that it will be useful,
|
||||
; but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
; GNU General Public License for more details.
|
||||
;
|
||||
; You should have received a copy of the GNU General Public License
|
||||
; along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
; NSIS_WIN32_MAKENSIS
|
||||
|
||||
!define PRODUCT "QEMU"
|
||||
!define URL "http://www.qemu.org/"
|
||||
|
||||
!define UNINST_EXE "$INSTDIR\qemu-uninstall.exe"
|
||||
!define UNINST_KEY "Software\Microsoft\Windows\CurrentVersion\Uninstall\${PRODUCT}"
|
||||
|
||||
!ifndef BINDIR
|
||||
!define BINDIR nsis.tmp
|
||||
!endif
|
||||
!ifndef SRCDIR
|
||||
!define SRCDIR .
|
||||
!endif
|
||||
!ifndef OUTFILE
|
||||
!define OUTFILE "qemu-setup.exe"
|
||||
!endif
|
||||
|
||||
; Optionally install documentation.
|
||||
!ifndef CONFIG_DOCUMENTATION
|
||||
!define CONFIG_DOCUMENTATION
|
||||
!endif
|
||||
|
||||
; Use maximum compression.
|
||||
SetCompressor /SOLID lzma
|
||||
|
||||
!include "MUI2.nsh"
|
||||
|
||||
; The name of the installer.
|
||||
Name "QEMU"
|
||||
|
||||
; The file to write
|
||||
OutFile "${OUTFILE}"
|
||||
|
||||
; The default installation directory.
|
||||
!ifdef W64
|
||||
InstallDir $PROGRAMFILES64\qemu
|
||||
!else
|
||||
InstallDir $PROGRAMFILES\qemu
|
||||
!endif
|
||||
|
||||
; Registry key to check for directory (so if you install again, it will
|
||||
; overwrite the old one automatically)
|
||||
InstallDirRegKey HKLM "Software\qemu" "Install_Dir"
|
||||
|
||||
; Request administrator privileges for Windows Vista.
|
||||
RequestExecutionLevel admin
|
||||
|
||||
;--------------------------------
|
||||
; Interface Settings.
|
||||
;!define MUI_HEADERIMAGE "qemu-nsis.bmp"
|
||||
; !define MUI_SPECIALBITMAP "qemu.bmp"
|
||||
!define MUI_ICON "${SRCDIR}\pc-bios\qemu-nsis.ico"
|
||||
!define MUI_UNICON "${SRCDIR}\pc-bios\qemu-nsis.ico"
|
||||
!define MUI_WELCOMEFINISHPAGE_BITMAP "${SRCDIR}\pc-bios\qemu-nsis.bmp"
|
||||
; !define MUI_HEADERIMAGE_BITMAP "qemu-install.bmp"
|
||||
; !define MUI_HEADERIMAGE_UNBITMAP "qemu-uninstall.bmp"
|
||||
; !define MUI_COMPONENTSPAGE_SMALLDESC
|
||||
; !define MUI_WELCOMEPAGE_TEXT "Insert text here.$\r$\n$\r$\n$\r$\n$_CLICK"
|
||||
|
||||
;--------------------------------
|
||||
; Pages.
|
||||
|
||||
!insertmacro MUI_PAGE_WELCOME
|
||||
!insertmacro MUI_PAGE_LICENSE "${SRCDIR}\COPYING"
|
||||
!insertmacro MUI_PAGE_COMPONENTS
|
||||
!insertmacro MUI_PAGE_DIRECTORY
|
||||
!insertmacro MUI_PAGE_INSTFILES
|
||||
!define MUI_FINISHPAGE_LINK "Visit the QEMU Wiki online!"
|
||||
!define MUI_FINISHPAGE_LINK_LOCATION "${URL}"
|
||||
!insertmacro MUI_PAGE_FINISH
|
||||
|
||||
!insertmacro MUI_UNPAGE_CONFIRM
|
||||
!insertmacro MUI_UNPAGE_INSTFILES
|
||||
|
||||
;--------------------------------
|
||||
; Languages.
|
||||
|
||||
!insertmacro MUI_LANGUAGE "English"
|
||||
!insertmacro MUI_LANGUAGE "French"
|
||||
!insertmacro MUI_LANGUAGE "German"
|
||||
|
||||
;--------------------------------
|
||||
|
||||
; The stuff to install.
|
||||
Section "${PRODUCT} (required)"
|
||||
|
||||
SectionIn RO
|
||||
|
||||
; Set output path to the installation directory.
|
||||
SetOutPath "$INSTDIR"
|
||||
|
||||
File "${SRCDIR}\Changelog"
|
||||
File "${SRCDIR}\COPYING"
|
||||
File "${SRCDIR}\COPYING.LIB"
|
||||
File "${SRCDIR}\README"
|
||||
File "${SRCDIR}\VERSION"
|
||||
|
||||
File "${BINDIR}\*.bmp"
|
||||
File "${BINDIR}\*.bin"
|
||||
File "${BINDIR}\*.dtb"
|
||||
File "${BINDIR}\*.rom"
|
||||
File "${BINDIR}\openbios-*"
|
||||
|
||||
File /r "${BINDIR}\keymaps"
|
||||
!ifdef CONFIG_GTK
|
||||
File /r "${BINDIR}\share"
|
||||
!endif
|
||||
|
||||
!ifdef W64
|
||||
SetRegView 64
|
||||
!endif
|
||||
|
||||
; Write the installation path into the registry
|
||||
WriteRegStr HKLM SOFTWARE\${PRODUCT} "Install_Dir" "$INSTDIR"
|
||||
|
||||
; Write the uninstall keys for Windows
|
||||
WriteRegStr HKLM "${UNINST_KEY}" "DisplayName" "QEMU"
|
||||
WriteRegStr HKLM "${UNINST_KEY}" "UninstallString" '"${UNINST_EXE}"'
|
||||
WriteRegDWORD HKLM "${UNINST_KEY}" "NoModify" 1
|
||||
WriteRegDWORD HKLM "${UNINST_KEY}" "NoRepair" 1
|
||||
WriteUninstaller "qemu-uninstall.exe"
|
||||
SectionEnd
|
||||
|
||||
Section "Tools" SectionTools
|
||||
SetOutPath "$INSTDIR"
|
||||
File "${BINDIR}\qemu-img.exe"
|
||||
File "${BINDIR}\qemu-io.exe"
|
||||
SectionEnd
|
||||
|
||||
SectionGroup "System Emulations" SectionSystem
|
||||
|
||||
!include "${BINDIR}\system-emulations.nsh"
|
||||
|
||||
SectionGroupEnd
|
||||
|
||||
!ifdef DLLDIR
|
||||
Section "Libraries (DLL)" SectionDll
|
||||
SetOutPath "$INSTDIR"
|
||||
File "${DLLDIR}\*.dll"
|
||||
SectionEnd
|
||||
!endif
|
||||
|
||||
!ifdef CONFIG_DOCUMENTATION
|
||||
Section "Documentation" SectionDoc
|
||||
SetOutPath "$INSTDIR"
|
||||
File "${BINDIR}\qemu-doc.html"
|
||||
File "${BINDIR}\qemu-tech.html"
|
||||
CreateDirectory "$SMPROGRAMS\${PRODUCT}"
|
||||
CreateShortCut "$SMPROGRAMS\${PRODUCT}\User Documentation.lnk" "$INSTDIR\qemu-doc.html" "" "$INSTDIR\qemu-doc.html" 0
|
||||
CreateShortCut "$SMPROGRAMS\${PRODUCT}\Technical Documentation.lnk" "$INSTDIR\qemu-tech.html" "" "$INSTDIR\qemu-tech.html" 0
|
||||
SectionEnd
|
||||
!endif
|
||||
|
||||
; Optional section (can be disabled by the user)
|
||||
Section "Start Menu Shortcuts" SectionMenu
|
||||
CreateDirectory "$SMPROGRAMS\${PRODUCT}"
|
||||
CreateShortCut "$SMPROGRAMS\${PRODUCT}\Uninstall.lnk" "${UNINST_EXE}" "" "${UNINST_EXE}" 0
|
||||
SectionEnd
|
||||
|
||||
;--------------------------------
|
||||
|
||||
; Uninstaller
|
||||
|
||||
Section "Uninstall"
|
||||
; Remove registry keys
|
||||
!ifdef W64
|
||||
SetRegView 64
|
||||
!endif
|
||||
DeleteRegKey HKLM "${UNINST_KEY}"
|
||||
DeleteRegKey HKLM SOFTWARE\${PRODUCT}
|
||||
|
||||
; Remove shortcuts, if any
|
||||
Delete "$SMPROGRAMS\${PRODUCT}\User Documentation.lnk"
|
||||
Delete "$SMPROGRAMS\${PRODUCT}\Technical Documentation.lnk"
|
||||
Delete "$SMPROGRAMS\${PRODUCT}\Uninstall.lnk"
|
||||
RMDir "$SMPROGRAMS\${PRODUCT}"
|
||||
|
||||
; Remove files and directories used
|
||||
Delete "$INSTDIR\Changelog"
|
||||
Delete "$INSTDIR\COPYING"
|
||||
Delete "$INSTDIR\COPYING.LIB"
|
||||
Delete "$INSTDIR\README"
|
||||
Delete "$INSTDIR\VERSION"
|
||||
Delete "$INSTDIR\*.bmp"
|
||||
Delete "$INSTDIR\*.bin"
|
||||
Delete "$INSTDIR\*.dll"
|
||||
Delete "$INSTDIR\*.dtb"
|
||||
Delete "$INSTDIR\*.rom"
|
||||
Delete "$INSTDIR\openbios-*"
|
||||
Delete "$INSTDIR\qemu-img.exe"
|
||||
Delete "$INSTDIR\qemu-io.exe"
|
||||
Delete "$INSTDIR\qemu.exe"
|
||||
Delete "$INSTDIR\qemu-system-*.exe"
|
||||
Delete "$INSTDIR\qemu-doc.html"
|
||||
Delete "$INSTDIR\qemu-tech.html"
|
||||
RMDir /r "$INSTDIR\keymaps"
|
||||
RMDir /r "$INSTDIR\share"
|
||||
; Remove generated files
|
||||
Delete "$INSTDIR\stderr.txt"
|
||||
Delete "$INSTDIR\stdout.txt"
|
||||
; Remove uninstaller
|
||||
Delete "${UNINST_EXE}"
|
||||
RMDir "$INSTDIR"
|
||||
SectionEnd
|
||||
|
||||
;--------------------------------
|
||||
|
||||
; Descriptions (mouse-over).
|
||||
!insertmacro MUI_FUNCTION_DESCRIPTION_BEGIN
|
||||
!insertmacro MUI_DESCRIPTION_TEXT ${SectionSystem} "System emulation."
|
||||
!insertmacro MUI_DESCRIPTION_TEXT ${Section_alpha} "Alpha system emulation."
|
||||
!insertmacro MUI_DESCRIPTION_TEXT ${Section_alphaw} "Alpha system emulation (GUI)."
|
||||
!insertmacro MUI_DESCRIPTION_TEXT ${Section_i386} "PC i386 system emulation."
|
||||
!insertmacro MUI_DESCRIPTION_TEXT ${Section_i386w} "PC i386 system emulation (GUI)."
|
||||
!insertmacro MUI_DESCRIPTION_TEXT ${SectionTools} "Tools."
|
||||
!ifdef DLLDIR
|
||||
!insertmacro MUI_DESCRIPTION_TEXT ${SectionDll} "Runtime Libraries (DLL)."
|
||||
!endif
|
||||
!ifdef CONFIG_DOCUMENTATION
|
||||
!insertmacro MUI_DESCRIPTION_TEXT ${SectionDoc} "Documentation."
|
||||
!endif
|
||||
!insertmacro MUI_DESCRIPTION_TEXT ${SectionMenu} "Menu entries."
|
||||
!insertmacro MUI_FUNCTION_DESCRIPTION_END
|
||||
|
||||
;--------------------------------
|
||||
; Functions.
|
||||
|
||||
Function .onInit
|
||||
!insertmacro MUI_LANGDLL_DISPLAY
|
||||
FunctionEnd
|
||||
|
|
@ -1653,7 +1653,7 @@ void define_one_arm_cp_reg_with_opaque(ARMCPU *cpu,
|
|||
"was %s, now %s\n", r2->cp, 32 + 32 * is64,
|
||||
r2->crn, r2->crm, r2->opc1, r2->opc2,
|
||||
oldreg->name, r2->name);
|
||||
assert(0);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
}
|
||||
g_hash_table_insert(cpu->cp_regs, key, r2);
|
||||
|
|
|
|||
|
|
@ -390,7 +390,7 @@ static inline int32_t mipsdsp_mul_q15_q15_overflowflag21(uint16_t a, uint16_t b,
|
|||
temp = 0x7FFFFFFF;
|
||||
set_DSPControl_overflow_flag(1, 21, env);
|
||||
} else {
|
||||
temp = ((int32_t)(int16_t)a * (int32_t)(int16_t)b) << 1;
|
||||
temp = ((int16_t)a * (int16_t)b) << 1;
|
||||
}
|
||||
|
||||
return temp;
|
||||
|
|
@ -583,7 +583,7 @@ static inline int64_t mipsdsp_mul_q31_q31(int32_t ac, uint32_t a, uint32_t b,
|
|||
temp = (0x01ull << 63) - 1;
|
||||
set_DSPControl_overflow_flag(1, 16 + ac, env);
|
||||
} else {
|
||||
temp = ((uint64_t)a * (uint64_t)b) << 1;
|
||||
temp = ((int64_t)(int32_t)a * (int32_t)b) << 1;
|
||||
}
|
||||
|
||||
return temp;
|
||||
|
|
@ -622,7 +622,7 @@ static inline int16_t mipsdsp_rndq15_mul_q15_q15(uint16_t a, uint16_t b,
|
|||
temp = 0x7FFF0000;
|
||||
set_DSPControl_overflow_flag(1, 21, env);
|
||||
} else {
|
||||
temp = (a * b) << 1;
|
||||
temp = ((int16_t)a * (int16_t)b) << 1;
|
||||
temp = temp + 0x00008000;
|
||||
}
|
||||
|
||||
|
|
@ -648,16 +648,22 @@ static inline int32_t mipsdsp_sat16_mul_q15_q15(uint16_t a, uint16_t b,
|
|||
static inline uint16_t mipsdsp_trunc16_sat16_round(int32_t a,
|
||||
CPUMIPSState *env)
|
||||
{
|
||||
int64_t temp;
|
||||
uint16_t temp;
|
||||
|
||||
temp = (int32_t)a + 0x00008000;
|
||||
|
||||
if (a > (int)0x7fff8000) {
|
||||
temp = 0x7FFFFFFF;
|
||||
/*
|
||||
* The value 0x00008000 will be added to the input Q31 value, and the code
|
||||
* needs to check if the addition causes an overflow. Since a positive value
|
||||
* is added, overflow can happen in one direction only.
|
||||
*/
|
||||
if (a > 0x7FFF7FFF) {
|
||||
temp = 0x7FFF;
|
||||
set_DSPControl_overflow_flag(1, 22, env);
|
||||
} else {
|
||||
temp = ((a + 0x8000) >> 16) & 0xFFFF;
|
||||
}
|
||||
|
||||
return (temp >> 16) & 0xFFFF;
|
||||
return temp;
|
||||
}
|
||||
|
||||
static inline uint8_t mipsdsp_sat8_reduce_precision(uint16_t a,
|
||||
|
|
|
|||
|
|
@ -1735,7 +1735,6 @@ target_ulong helper_evpe(CPUMIPSState *env)
|
|||
void helper_fork(target_ulong arg1, target_ulong arg2)
|
||||
{
|
||||
// arg1 = rt, arg2 = rs
|
||||
arg1 = 0;
|
||||
// TODO: store to TC register
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -9571,8 +9571,7 @@ static void decode_i64_mips16 (DisasContext *ctx,
|
|||
}
|
||||
#endif
|
||||
|
||||
static int decode_extended_mips16_opc (CPUMIPSState *env, DisasContext *ctx,
|
||||
int *is_branch)
|
||||
static int decode_extended_mips16_opc (CPUMIPSState *env, DisasContext *ctx)
|
||||
{
|
||||
int extend = cpu_lduw_code(env, ctx->pc + 2);
|
||||
int op, rx, ry, funct, sa;
|
||||
|
|
@ -9763,8 +9762,7 @@ static int decode_extended_mips16_opc (CPUMIPSState *env, DisasContext *ctx,
|
|||
return 4;
|
||||
}
|
||||
|
||||
static int decode_mips16_opc (CPUMIPSState *env, DisasContext *ctx,
|
||||
int *is_branch)
|
||||
static int decode_mips16_opc (CPUMIPSState *env, DisasContext *ctx)
|
||||
{
|
||||
int rx, ry;
|
||||
int sa;
|
||||
|
|
@ -9807,7 +9805,6 @@ static int decode_mips16_opc (CPUMIPSState *env, DisasContext *ctx,
|
|||
op = ((ctx->opcode >> 10) & 0x1) ? OPC_JALXS : OPC_JALS;
|
||||
gen_compute_branch(ctx, op, 4, rx, ry, offset);
|
||||
n_bytes = 4;
|
||||
*is_branch = 1;
|
||||
break;
|
||||
case M16_OPC_BEQZ:
|
||||
gen_compute_branch(ctx, OPC_BEQ, 2, rx, 0, ((int8_t)ctx->opcode) << 1);
|
||||
|
|
@ -10046,9 +10043,6 @@ static int decode_mips16_opc (CPUMIPSState *env, DisasContext *ctx,
|
|||
}
|
||||
|
||||
gen_compute_branch(ctx, op, 2, ra ? 31 : rx, 31, 0);
|
||||
if (!nd) {
|
||||
*is_branch = 1;
|
||||
}
|
||||
}
|
||||
break;
|
||||
case RR_SDBBP:
|
||||
|
|
@ -10193,7 +10187,7 @@ static int decode_mips16_opc (CPUMIPSState *env, DisasContext *ctx,
|
|||
}
|
||||
break;
|
||||
case M16_OPC_EXTEND:
|
||||
decode_extended_mips16_opc(env, ctx, is_branch);
|
||||
decode_extended_mips16_opc(env, ctx);
|
||||
n_bytes = 4;
|
||||
break;
|
||||
#if defined(TARGET_MIPS64)
|
||||
|
|
@ -10802,7 +10796,7 @@ static void gen_ldst_multiple (DisasContext *ctx, uint32_t opc, int reglist,
|
|||
}
|
||||
|
||||
|
||||
static void gen_pool16c_insn(DisasContext *ctx, int *is_branch)
|
||||
static void gen_pool16c_insn(DisasContext *ctx)
|
||||
{
|
||||
int rd = mmreg((ctx->opcode >> 3) & 0x7);
|
||||
int rs = mmreg(ctx->opcode & 0x7);
|
||||
|
|
@ -10864,7 +10858,6 @@ static void gen_pool16c_insn(DisasContext *ctx, int *is_branch)
|
|||
|
||||
gen_compute_branch(ctx, OPC_JR, 2, reg, 0, 0);
|
||||
}
|
||||
*is_branch = 1;
|
||||
break;
|
||||
case JRC16 + 0:
|
||||
case JRC16 + 1:
|
||||
|
|
@ -10889,7 +10882,6 @@ static void gen_pool16c_insn(DisasContext *ctx, int *is_branch)
|
|||
|
||||
gen_compute_branch(ctx, opc, 2, reg, 31, 0);
|
||||
}
|
||||
*is_branch = 1;
|
||||
break;
|
||||
case MFHI16 + 0:
|
||||
case MFHI16 + 1:
|
||||
|
|
@ -11020,8 +11012,7 @@ static void gen_ldst_pair (DisasContext *ctx, uint32_t opc, int rd,
|
|||
tcg_temp_free(t1);
|
||||
}
|
||||
|
||||
static void gen_pool32axf (CPUMIPSState *env, DisasContext *ctx, int rt, int rs,
|
||||
int *is_branch)
|
||||
static void gen_pool32axf (CPUMIPSState *env, DisasContext *ctx, int rt, int rs)
|
||||
{
|
||||
int extension = (ctx->opcode >> 6) & 0x3f;
|
||||
int minor = (ctx->opcode >> 12) & 0xf;
|
||||
|
|
@ -11147,12 +11138,10 @@ static void gen_pool32axf (CPUMIPSState *env, DisasContext *ctx, int rt, int rs,
|
|||
case JALR:
|
||||
case JALR_HB:
|
||||
gen_compute_branch (ctx, OPC_JALR, 4, rs, rt, 0);
|
||||
*is_branch = 1;
|
||||
break;
|
||||
case JALRS:
|
||||
case JALRS_HB:
|
||||
gen_compute_branch (ctx, OPC_JALRS, 4, rs, rt, 0);
|
||||
*is_branch = 1;
|
||||
break;
|
||||
default:
|
||||
goto pool32axf_invalid;
|
||||
|
|
@ -11551,7 +11540,7 @@ static void gen_pool32fxf(DisasContext *ctx, int rt, int rs)
|
|||
}
|
||||
|
||||
static void decode_micromips32_opc (CPUMIPSState *env, DisasContext *ctx,
|
||||
uint16_t insn_hw1, int *is_branch)
|
||||
uint16_t insn_hw1)
|
||||
{
|
||||
int32_t offset;
|
||||
uint16_t insn;
|
||||
|
|
@ -11685,7 +11674,7 @@ static void decode_micromips32_opc (CPUMIPSState *env, DisasContext *ctx,
|
|||
gen_bitops(ctx, OPC_EXT, rt, rs, rr, rd);
|
||||
return;
|
||||
case POOL32AXF:
|
||||
gen_pool32axf(env, ctx, rt, rs, is_branch);
|
||||
gen_pool32axf(env, ctx, rt, rs);
|
||||
break;
|
||||
case 0x07:
|
||||
generate_exception(ctx, EXCP_BREAK);
|
||||
|
|
@ -12048,7 +12037,6 @@ static void decode_micromips32_opc (CPUMIPSState *env, DisasContext *ctx,
|
|||
mips32_op = OPC_BGTZ;
|
||||
do_branch:
|
||||
gen_compute_branch(ctx, mips32_op, 4, rs, -1, imm << 1);
|
||||
*is_branch = 1;
|
||||
break;
|
||||
|
||||
/* Traps */
|
||||
|
|
@ -12109,7 +12097,6 @@ static void decode_micromips32_opc (CPUMIPSState *env, DisasContext *ctx,
|
|||
do_cp1branch:
|
||||
gen_compute_branch1(ctx, mips32_op,
|
||||
(ctx->opcode >> 18) & 0x7, imm << 1);
|
||||
*is_branch = 1;
|
||||
break;
|
||||
case BPOSGE64:
|
||||
case BPOSGE32:
|
||||
|
|
@ -12216,30 +12203,24 @@ static void decode_micromips32_opc (CPUMIPSState *env, DisasContext *ctx,
|
|||
case JALX32:
|
||||
offset = (int32_t)(ctx->opcode & 0x3FFFFFF) << 2;
|
||||
gen_compute_branch(ctx, OPC_JALX, 4, rt, rs, offset);
|
||||
*is_branch = 1;
|
||||
break;
|
||||
case JALS32:
|
||||
offset = (int32_t)(ctx->opcode & 0x3FFFFFF) << 1;
|
||||
gen_compute_branch(ctx, OPC_JALS, 4, rt, rs, offset);
|
||||
*is_branch = 1;
|
||||
break;
|
||||
case BEQ32:
|
||||
gen_compute_branch(ctx, OPC_BEQ, 4, rt, rs, imm << 1);
|
||||
*is_branch = 1;
|
||||
break;
|
||||
case BNE32:
|
||||
gen_compute_branch(ctx, OPC_BNE, 4, rt, rs, imm << 1);
|
||||
*is_branch = 1;
|
||||
break;
|
||||
case J32:
|
||||
gen_compute_branch(ctx, OPC_J, 4, rt, rs,
|
||||
(int32_t)(ctx->opcode & 0x3FFFFFF) << 1);
|
||||
*is_branch = 1;
|
||||
break;
|
||||
case JAL32:
|
||||
gen_compute_branch(ctx, OPC_JAL, 4, rt, rs,
|
||||
(int32_t)(ctx->opcode & 0x3FFFFFF) << 1);
|
||||
*is_branch = 1;
|
||||
break;
|
||||
/* Floating point (COP1) */
|
||||
case LWC132:
|
||||
|
|
@ -12309,7 +12290,7 @@ static void decode_micromips32_opc (CPUMIPSState *env, DisasContext *ctx,
|
|||
}
|
||||
}
|
||||
|
||||
static int decode_micromips_opc (CPUMIPSState *env, DisasContext *ctx, int *is_branch)
|
||||
static int decode_micromips_opc (CPUMIPSState *env, DisasContext *ctx)
|
||||
{
|
||||
uint32_t op;
|
||||
|
||||
|
|
@ -12442,7 +12423,7 @@ static int decode_micromips_opc (CPUMIPSState *env, DisasContext *ctx, int *is_b
|
|||
}
|
||||
break;
|
||||
case POOL16C:
|
||||
gen_pool16c_insn(ctx, is_branch);
|
||||
gen_pool16c_insn(ctx);
|
||||
break;
|
||||
case LWGP16:
|
||||
{
|
||||
|
|
@ -12582,14 +12563,12 @@ static int decode_micromips_opc (CPUMIPSState *env, DisasContext *ctx, int *is_b
|
|||
case B16:
|
||||
gen_compute_branch(ctx, OPC_BEQ, 2, 0, 0,
|
||||
SIMM(ctx->opcode, 0, 10) << 1);
|
||||
*is_branch = 1;
|
||||
break;
|
||||
case BNEZ16:
|
||||
case BEQZ16:
|
||||
gen_compute_branch(ctx, op == BNEZ16 ? OPC_BNE : OPC_BEQ, 2,
|
||||
mmreg(uMIPS_RD(ctx->opcode)),
|
||||
0, SIMM(ctx->opcode, 0, 7) << 1);
|
||||
*is_branch = 1;
|
||||
break;
|
||||
case LI16:
|
||||
{
|
||||
|
|
@ -12610,7 +12589,7 @@ static int decode_micromips_opc (CPUMIPSState *env, DisasContext *ctx, int *is_b
|
|||
generate_exception(ctx, EXCP_RI);
|
||||
break;
|
||||
default:
|
||||
decode_micromips32_opc (env, ctx, op, is_branch);
|
||||
decode_micromips32_opc (env, ctx, op);
|
||||
return 4;
|
||||
}
|
||||
|
||||
|
|
@ -14346,7 +14325,7 @@ static void gen_mipsdsp_accinsn(DisasContext *ctx, uint32_t op1, uint32_t op2,
|
|||
|
||||
/* End MIPSDSP functions. */
|
||||
|
||||
static void decode_opc (CPUMIPSState *env, DisasContext *ctx, int *is_branch)
|
||||
static void decode_opc (CPUMIPSState *env, DisasContext *ctx)
|
||||
{
|
||||
int32_t offset;
|
||||
int rs, rt, rd, sa;
|
||||
|
|
@ -14460,7 +14439,6 @@ static void decode_opc (CPUMIPSState *env, DisasContext *ctx, int *is_branch)
|
|||
break;
|
||||
case OPC_JR ... OPC_JALR:
|
||||
gen_compute_branch(ctx, op1, 4, rs, rd, sa);
|
||||
*is_branch = 1;
|
||||
break;
|
||||
case OPC_TGE ... OPC_TEQ: /* Traps */
|
||||
case OPC_TNE:
|
||||
|
|
@ -15227,7 +15205,6 @@ static void decode_opc (CPUMIPSState *env, DisasContext *ctx, int *is_branch)
|
|||
case OPC_BLTZ ... OPC_BGEZL: /* REGIMM branches */
|
||||
case OPC_BLTZAL ... OPC_BGEZALL:
|
||||
gen_compute_branch(ctx, op1, 4, rs, -1, imm << 2);
|
||||
*is_branch = 1;
|
||||
break;
|
||||
case OPC_TGEI ... OPC_TEQI: /* REGIMM traps */
|
||||
case OPC_TNEI:
|
||||
|
|
@ -15243,7 +15220,6 @@ static void decode_opc (CPUMIPSState *env, DisasContext *ctx, int *is_branch)
|
|||
#endif
|
||||
check_dsp(ctx);
|
||||
gen_compute_branch(ctx, op1, 4, -1, -2, (int32_t)imm << 2);
|
||||
*is_branch = 1;
|
||||
break;
|
||||
default: /* Invalid */
|
||||
MIPS_INVAL("regimm");
|
||||
|
|
@ -15355,12 +15331,10 @@ static void decode_opc (CPUMIPSState *env, DisasContext *ctx, int *is_branch)
|
|||
case OPC_J ... OPC_JAL: /* Jump */
|
||||
offset = (int32_t)(ctx->opcode & 0x3FFFFFF) << 2;
|
||||
gen_compute_branch(ctx, op, 4, rs, rt, offset);
|
||||
*is_branch = 1;
|
||||
break;
|
||||
case OPC_BEQ ... OPC_BGTZ: /* Branch */
|
||||
case OPC_BEQL ... OPC_BGTZL:
|
||||
gen_compute_branch(ctx, op, 4, rs, rt, imm << 2);
|
||||
*is_branch = 1;
|
||||
break;
|
||||
case OPC_LB ... OPC_LWR: /* Load and stores */
|
||||
case OPC_LL:
|
||||
|
|
@ -15420,7 +15394,6 @@ static void decode_opc (CPUMIPSState *env, DisasContext *ctx, int *is_branch)
|
|||
case OPC_BC1:
|
||||
gen_compute_branch1(ctx, MASK_BC1(ctx->opcode),
|
||||
(rt >> 2) & 0x7, imm << 2);
|
||||
*is_branch = 1;
|
||||
break;
|
||||
case OPC_S_FMT:
|
||||
case OPC_D_FMT:
|
||||
|
|
@ -15527,7 +15500,6 @@ static void decode_opc (CPUMIPSState *env, DisasContext *ctx, int *is_branch)
|
|||
check_insn(ctx, ASE_MIPS16 | ASE_MICROMIPS);
|
||||
offset = (int32_t)(ctx->opcode & 0x3FFFFFF) << 2;
|
||||
gen_compute_branch(ctx, op, 4, rs, rt, offset);
|
||||
*is_branch = 1;
|
||||
break;
|
||||
case OPC_MDMX:
|
||||
check_insn(ctx, ASE_MDMX);
|
||||
|
|
@ -15553,7 +15525,7 @@ gen_intermediate_code_internal(MIPSCPU *cpu, TranslationBlock *tb,
|
|||
int num_insns;
|
||||
int max_insns;
|
||||
int insn_bytes;
|
||||
int is_branch;
|
||||
int is_delay;
|
||||
|
||||
if (search_pc)
|
||||
qemu_log("search pc %d\n", search_pc);
|
||||
|
|
@ -15611,23 +15583,23 @@ gen_intermediate_code_internal(MIPSCPU *cpu, TranslationBlock *tb,
|
|||
if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO))
|
||||
gen_io_start();
|
||||
|
||||
is_branch = 0;
|
||||
is_delay = ctx.hflags & MIPS_HFLAG_BMASK;
|
||||
if (!(ctx.hflags & MIPS_HFLAG_M16)) {
|
||||
ctx.opcode = cpu_ldl_code(env, ctx.pc);
|
||||
insn_bytes = 4;
|
||||
decode_opc(env, &ctx, &is_branch);
|
||||
decode_opc(env, &ctx);
|
||||
} else if (ctx.insn_flags & ASE_MICROMIPS) {
|
||||
ctx.opcode = cpu_lduw_code(env, ctx.pc);
|
||||
insn_bytes = decode_micromips_opc(env, &ctx, &is_branch);
|
||||
insn_bytes = decode_micromips_opc(env, &ctx);
|
||||
} else if (ctx.insn_flags & ASE_MIPS16) {
|
||||
ctx.opcode = cpu_lduw_code(env, ctx.pc);
|
||||
insn_bytes = decode_mips16_opc(env, &ctx, &is_branch);
|
||||
insn_bytes = decode_mips16_opc(env, &ctx);
|
||||
} else {
|
||||
generate_exception(&ctx, EXCP_RI);
|
||||
ctx.bstate = BS_STOP;
|
||||
break;
|
||||
}
|
||||
if (!is_branch) {
|
||||
if (is_delay) {
|
||||
handle_delay_slot(&ctx, insn_bytes);
|
||||
}
|
||||
ctx.pc += insn_bytes;
|
||||
|
|
|
|||
|
|
@ -14,7 +14,7 @@ int main()
|
|||
resultdsp = 0x01;
|
||||
__asm
|
||||
("mthi %0, $ac1\n\t"
|
||||
"mtlo %0, $ac1\n\t"
|
||||
"mtlo %1, $ac1\n\t"
|
||||
"dpaq_sa.l.w $ac1, %3, %4\n\t"
|
||||
"mfhi %0, $ac1\n\t"
|
||||
"mflo %1, $ac1\n\t"
|
||||
|
|
@ -27,8 +27,8 @@ int main()
|
|||
assert(ach == resulth);
|
||||
assert(acl == resultl);
|
||||
|
||||
ach = 0x12;
|
||||
acl = 0x48;
|
||||
ach = 0x00000012;
|
||||
acl = 0x00000048;
|
||||
rs = 0x80000000;
|
||||
rt = 0x80000000;
|
||||
|
||||
|
|
@ -37,7 +37,7 @@ int main()
|
|||
resultdsp = 0x01;
|
||||
__asm
|
||||
("mthi %0, $ac1\n\t"
|
||||
"mtlo %0, $ac1\n\t"
|
||||
"mtlo %1, $ac1\n\t"
|
||||
"dpaq_sa.l.w $ac1, %3, %4\n\t"
|
||||
"mfhi %0, $ac1\n\t"
|
||||
"mflo %1, $ac1\n\t"
|
||||
|
|
@ -51,16 +51,64 @@ int main()
|
|||
assert(acl == resultl);
|
||||
|
||||
ach = 0x741532A0;
|
||||
acl = 0xfceabb08;
|
||||
acl = 0xFCEABB08;
|
||||
rs = 0x80000000;
|
||||
rt = 0x80000000;
|
||||
|
||||
resulth = 0x7fffffff;
|
||||
resultl = 0xffffffff;
|
||||
resulth = 0x7FFFFFFF;
|
||||
resultl = 0xFFFFFFFF;
|
||||
resultdsp = 0x01;
|
||||
__asm
|
||||
("mthi %0, $ac1\n\t"
|
||||
"mtlo %0, $ac1\n\t"
|
||||
"mtlo %1, $ac1\n\t"
|
||||
"dpaq_sa.l.w $ac1, %3, %4\n\t"
|
||||
"mfhi %0, $ac1\n\t"
|
||||
"mflo %1, $ac1\n\t"
|
||||
"rddsp %2\n\t"
|
||||
: "+r"(ach), "+r"(acl), "=r"(dsp)
|
||||
: "r"(rs), "r"(rt)
|
||||
);
|
||||
dsp = (dsp >> 17) & 0x01;
|
||||
assert(dsp == resultdsp);
|
||||
assert(ach == resulth);
|
||||
assert(acl == resultl);
|
||||
|
||||
ach = 0;
|
||||
acl = 0;
|
||||
rs = 0xC0000000;
|
||||
rt = 0x7FFFFFFF;
|
||||
|
||||
resulth = 0xC0000000;
|
||||
resultl = 0x80000000;
|
||||
resultdsp = 0;
|
||||
__asm
|
||||
("wrdsp $0\n\t"
|
||||
"mthi %0, $ac1\n\t"
|
||||
"mtlo %1, $ac1\n\t"
|
||||
"dpaq_sa.l.w $ac1, %3, %4\n\t"
|
||||
"mfhi %0, $ac1\n\t"
|
||||
"mflo %1, $ac1\n\t"
|
||||
"rddsp %2\n\t"
|
||||
: "+r"(ach), "+r"(acl), "=r"(dsp)
|
||||
: "r"(rs), "r"(rt)
|
||||
);
|
||||
dsp = (dsp >> 17) & 0x01;
|
||||
assert(dsp == resultdsp);
|
||||
assert(ach == resulth);
|
||||
assert(acl == resultl);
|
||||
|
||||
ach = 0x20000000;
|
||||
acl = 0;
|
||||
rs = 0xE0000000;
|
||||
rt = 0x7FFFFFFF;
|
||||
|
||||
resulth = 0;
|
||||
resultl = 0x40000000;
|
||||
resultdsp = 0;
|
||||
__asm
|
||||
("wrdsp $0\n\t"
|
||||
"mthi %0, $ac1\n\t"
|
||||
"mtlo %1, $ac1\n\t"
|
||||
"dpaq_sa.l.w $ac1, %3, %4\n\t"
|
||||
"mfhi %0, $ac1\n\t"
|
||||
"mflo %1, $ac1\n\t"
|
||||
|
|
|
|||
|
|
@ -9,8 +9,8 @@ int main()
|
|||
|
||||
rs = 0xBC0123AD;
|
||||
rt = 0x01643721;
|
||||
resulth = 0xfdf4cbe0;
|
||||
resultl = 0xd138776b;
|
||||
resulth = 0x00BD3A22;
|
||||
resultl = 0xD138776B;
|
||||
resultdsp = 0x00;
|
||||
__asm
|
||||
("mthi %0, $ac1\n\t"
|
||||
|
|
|
|||
|
|
@ -12,7 +12,24 @@ int main()
|
|||
resultdsp = 1;
|
||||
|
||||
__asm
|
||||
("mulq_rs.ph %0, %2, %3\n\t"
|
||||
("wrdsp $0\n\t"
|
||||
"mulq_rs.ph %0, %2, %3\n\t"
|
||||
"rddsp %1\n\t"
|
||||
: "=r"(rd), "=r"(dsp)
|
||||
: "r"(rs), "r"(rt)
|
||||
);
|
||||
dsp = (dsp >> 21) & 0x01;
|
||||
assert(rd == result);
|
||||
assert(dsp == resultdsp);
|
||||
|
||||
rs = 0x80011234;
|
||||
rt = 0x80024321;
|
||||
result = 0x7FFD098C;
|
||||
resultdsp = 0;
|
||||
|
||||
__asm
|
||||
("wrdsp $0\n\t"
|
||||
"mulq_rs.ph %0, %2, %3\n\t"
|
||||
"rddsp %1\n\t"
|
||||
: "=r"(rd), "=r"(dsp)
|
||||
: "r"(rs), "r"(rt)
|
||||
|
|
|
|||
|
|
@ -12,18 +12,34 @@ int main()
|
|||
result = 0x12348765;
|
||||
|
||||
__asm
|
||||
("precrq_rs.ph.w %0, %1, %2\n\t"
|
||||
("wrdsp $0\n\t"
|
||||
"precrq_rs.ph.w %0, %1, %2\n\t"
|
||||
: "=r"(rd)
|
||||
: "r"(rs), "r"(rt)
|
||||
);
|
||||
assert(result == rd);
|
||||
|
||||
rs = 0x7fffC678;
|
||||
rs = 0x7FFFC678;
|
||||
rt = 0x865432A0;
|
||||
result = 0x7fff8654;
|
||||
result = 0x7FFF8654;
|
||||
|
||||
__asm
|
||||
("precrq_rs.ph.w %0, %2, %3\n\t"
|
||||
("wrdsp $0\n\t"
|
||||
"precrq_rs.ph.w %0, %2, %3\n\t"
|
||||
"rddsp %1\n\t"
|
||||
: "=r"(rd), "=r"(dsp)
|
||||
: "r"(rs), "r"(rt)
|
||||
);
|
||||
assert(((dsp >> 22) & 0x01) == 1);
|
||||
assert(result == rd);
|
||||
|
||||
rs = 0xBEEFFEED;
|
||||
rt = 0x7FFF8000;
|
||||
result = 0xBEF07FFF;
|
||||
|
||||
__asm
|
||||
("wrdsp $0\n\t"
|
||||
"precrq_rs.ph.w %0, %2, %3\n\t"
|
||||
"rddsp %1\n\t"
|
||||
: "=r"(rd), "=r"(dsp)
|
||||
: "r"(rs), "r"(rt)
|
||||
|
|
|
|||
|
|
@ -394,7 +394,7 @@ static void test_native_list_integer_helper(TestInputVisitorData *data,
|
|||
break;
|
||||
}
|
||||
default:
|
||||
g_assert(false);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
g_string_free(gstr_union, true);
|
||||
|
|
|
|||
|
|
@ -559,7 +559,7 @@ static void init_native_list(UserDefNativeListUnion *cvalue)
|
|||
break;
|
||||
}
|
||||
default:
|
||||
g_assert(false);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -645,7 +645,7 @@ static void check_native_list(QObject *qobj,
|
|||
}
|
||||
break;
|
||||
default:
|
||||
g_assert(false);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
QDECREF(qlist);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -136,7 +136,7 @@ static void visit_primitive_type(Visitor *v, void **native, Error **errp)
|
|||
visit_type_int64(v, &pt->value.s64, NULL, errp);
|
||||
break;
|
||||
case PTYPE_EOL:
|
||||
g_assert(false);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -181,7 +181,7 @@ static void visit_primitive_list(Visitor *v, void **native, Error **errp)
|
|||
visit_type_uint64List(v, &pl->value.u64_integers, NULL, errp);
|
||||
break;
|
||||
default:
|
||||
g_assert(false);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -500,7 +500,7 @@ static void test_primitive_lists(gconstpointer opaque)
|
|||
break;
|
||||
}
|
||||
default:
|
||||
g_assert(0);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -656,7 +656,7 @@ static void test_primitive_lists(gconstpointer opaque)
|
|||
break;
|
||||
}
|
||||
default:
|
||||
g_assert(0);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
i++;
|
||||
} while (cur_head);
|
||||
|
|
|
|||
|
|
@ -30,12 +30,7 @@
|
|||
#include "qemu-common.h"
|
||||
#include "qemu/aes.h"
|
||||
|
||||
#ifndef NDEBUG
|
||||
#define NDEBUG
|
||||
#endif
|
||||
|
||||
typedef uint32_t u32;
|
||||
typedef uint16_t u16;
|
||||
typedef uint8_t u8;
|
||||
|
||||
/* This controls loop-unrolling in aes_core.c */
|
||||
|
|
|
|||
Loading…
Reference in New Issue