hw/arm/spitz: Detabify
The spitz board has been around a long time, and still has a fair number of hard-coded tab characters in it. We're about to do some work on this source file, so start out by expanding out the tabs. This commit is a pure whitespace only change. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20200628142429.17111-2-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell
parent
e757db25aa
commit
f6319db25d
156
hw/arm/spitz.c
156
hw/arm/spitz.c
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@ -34,25 +34,25 @@
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#include "cpu.h"
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#undef REG_FMT
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#define REG_FMT "0x%02lx"
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#define REG_FMT "0x%02lx"
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/* Spitz Flash */
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#define FLASH_BASE 0x0c000000
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#define FLASH_ECCLPLB 0x00 /* Line parity 7 - 0 bit */
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#define FLASH_ECCLPUB 0x04 /* Line parity 15 - 8 bit */
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#define FLASH_ECCCP 0x08 /* Column parity 5 - 0 bit */
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#define FLASH_ECCCNTR 0x0c /* ECC byte counter */
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#define FLASH_ECCCLRR 0x10 /* Clear ECC */
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#define FLASH_FLASHIO 0x14 /* Flash I/O */
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#define FLASH_FLASHCTL 0x18 /* Flash Control */
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#define FLASH_BASE 0x0c000000
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#define FLASH_ECCLPLB 0x00 /* Line parity 7 - 0 bit */
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#define FLASH_ECCLPUB 0x04 /* Line parity 15 - 8 bit */
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#define FLASH_ECCCP 0x08 /* Column parity 5 - 0 bit */
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#define FLASH_ECCCNTR 0x0c /* ECC byte counter */
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#define FLASH_ECCCLRR 0x10 /* Clear ECC */
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#define FLASH_FLASHIO 0x14 /* Flash I/O */
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#define FLASH_FLASHCTL 0x18 /* Flash Control */
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#define FLASHCTL_CE0 (1 << 0)
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#define FLASHCTL_CLE (1 << 1)
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#define FLASHCTL_ALE (1 << 2)
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#define FLASHCTL_WP (1 << 3)
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#define FLASHCTL_CE1 (1 << 4)
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#define FLASHCTL_RYBY (1 << 5)
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#define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1)
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#define FLASHCTL_CE0 (1 << 0)
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#define FLASHCTL_CLE (1 << 1)
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#define FLASHCTL_ALE (1 << 2)
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#define FLASHCTL_WP (1 << 3)
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#define FLASHCTL_CE1 (1 << 4)
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#define FLASHCTL_RYBY (1 << 5)
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#define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1)
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#define TYPE_SL_NAND "sl-nand"
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#define SL_NAND(obj) OBJECT_CHECK(SLNANDState, (obj), TYPE_SL_NAND)
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@ -74,12 +74,12 @@ static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size)
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int ryby;
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switch (addr) {
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#define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to))
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#define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to))
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case FLASH_ECCLPLB:
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return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) |
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BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7);
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#define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to))
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#define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to))
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case FLASH_ECCLPUB:
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return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) |
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BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7);
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@ -191,8 +191,8 @@ static void sl_nand_realize(DeviceState *dev, Error **errp)
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/* Spitz Keyboard */
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#define SPITZ_KEY_STROBE_NUM 11
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#define SPITZ_KEY_SENSE_NUM 7
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#define SPITZ_KEY_STROBE_NUM 11
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#define SPITZ_KEY_SENSE_NUM 7
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static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = {
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12, 17, 91, 34, 36, 38, 39
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@ -214,11 +214,11 @@ static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = {
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{ 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 },
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};
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#define SPITZ_GPIO_AK_INT 13 /* Remote control */
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#define SPITZ_GPIO_SYNC 16 /* Sync button */
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#define SPITZ_GPIO_ON_KEY 95 /* Power button */
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#define SPITZ_GPIO_SWA 97 /* Lid */
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#define SPITZ_GPIO_SWB 96 /* Tablet mode */
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#define SPITZ_GPIO_AK_INT 13 /* Remote control */
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#define SPITZ_GPIO_SYNC 16 /* Sync button */
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#define SPITZ_GPIO_ON_KEY 95 /* Power button */
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#define SPITZ_GPIO_SWA 97 /* Lid */
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#define SPITZ_GPIO_SWB 96 /* Tablet mode */
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/* The special buttons are mapped to unused keys */
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static const int spitz_gpiomap[5] = {
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@ -300,7 +300,7 @@ static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode)
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#define SPITZ_MOD_CTRL (1 << 8)
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#define SPITZ_MOD_FN (1 << 9)
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#define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c
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#define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c
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static void spitz_keyboard_handler(void *opaque, int keycode)
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{
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@ -308,25 +308,25 @@ static void spitz_keyboard_handler(void *opaque, int keycode)
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uint16_t code;
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int mapcode;
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switch (keycode) {
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case 0x2a: /* Left Shift */
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case 0x2a: /* Left Shift */
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s->modifiers |= 1;
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break;
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case 0xaa:
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s->modifiers &= ~1;
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break;
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case 0x36: /* Right Shift */
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case 0x36: /* Right Shift */
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s->modifiers |= 2;
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break;
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case 0xb6:
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s->modifiers &= ~2;
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break;
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case 0x1d: /* Control */
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case 0x1d: /* Control */
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s->modifiers |= 4;
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break;
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case 0x9d:
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s->modifiers &= ~4;
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break;
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case 0x38: /* Alt */
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case 0x38: /* Alt */
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s->modifiers |= 8;
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break;
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case 0xb8:
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@ -536,14 +536,14 @@ static void spitz_keyboard_realize(DeviceState *dev, Error **errp)
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/* LCD backlight controller */
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#define LCDTG_RESCTL 0x00
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#define LCDTG_PHACTRL 0x01
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#define LCDTG_DUTYCTRL 0x02
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#define LCDTG_POWERREG0 0x03
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#define LCDTG_POWERREG1 0x04
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#define LCDTG_GPOR3 0x05
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#define LCDTG_PICTRL 0x06
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#define LCDTG_POLCTRL 0x07
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#define LCDTG_RESCTL 0x00
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#define LCDTG_PHACTRL 0x01
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#define LCDTG_DUTYCTRL 0x02
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#define LCDTG_POWERREG0 0x03
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#define LCDTG_POWERREG1 0x04
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#define LCDTG_GPOR3 0x05
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#define LCDTG_PICTRL 0x06
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#define LCDTG_POLCTRL 0x07
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typedef struct {
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SSISlave ssidev;
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@ -623,12 +623,12 @@ static void spitz_lcdtg_realize(SSISlave *dev, Error **errp)
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/* SSP devices */
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#define CORGI_SSP_PORT 2
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#define CORGI_SSP_PORT 2
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#define SPITZ_GPIO_LCDCON_CS 53
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#define SPITZ_GPIO_ADS7846_CS 14
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#define SPITZ_GPIO_MAX1111_CS 20
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#define SPITZ_GPIO_TP_INT 11
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#define SPITZ_GPIO_LCDCON_CS 53
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#define SPITZ_GPIO_ADS7846_CS 14
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#define SPITZ_GPIO_MAX1111_CS 20
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#define SPITZ_GPIO_TP_INT 11
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static DeviceState *max1111;
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@ -659,13 +659,13 @@ static void corgi_ssp_gpio_cs(void *opaque, int line, int level)
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s->enable[line] = !level;
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}
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#define MAX1111_BATT_VOLT 1
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#define MAX1111_BATT_TEMP 2
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#define MAX1111_ACIN_VOLT 3
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#define MAX1111_BATT_VOLT 1
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#define MAX1111_BATT_TEMP 2
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#define MAX1111_ACIN_VOLT 3
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#define SPITZ_BATTERY_TEMP 0xe0 /* About 2.9V */
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#define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */
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#define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */
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#define SPITZ_BATTERY_TEMP 0xe0 /* About 2.9V */
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#define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */
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#define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */
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static void spitz_adc_temp_on(void *opaque, int line, int level)
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{
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@ -735,11 +735,11 @@ static void spitz_microdrive_attach(PXA2xxState *cpu, int slot)
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/* Wm8750 and Max7310 on I2C */
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#define AKITA_MAX_ADDR 0x18
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#define SPITZ_WM_ADDRL 0x1b
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#define SPITZ_WM_ADDRH 0x1a
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#define AKITA_MAX_ADDR 0x18
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#define SPITZ_WM_ADDRL 0x1b
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#define SPITZ_WM_ADDRH 0x1a
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#define SPITZ_GPIO_WM 5
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#define SPITZ_GPIO_WM 5
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static void spitz_wm8750_addr(void *opaque, int line, int level)
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{
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@ -806,20 +806,20 @@ static void spitz_out_switch(void *opaque, int line, int level)
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}
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}
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#define SPITZ_SCP_LED_GREEN 1
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#define SPITZ_SCP_JK_B 2
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#define SPITZ_SCP_CHRG_ON 3
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#define SPITZ_SCP_MUTE_L 4
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#define SPITZ_SCP_MUTE_R 5
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#define SPITZ_SCP_CF_POWER 6
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#define SPITZ_SCP_LED_ORANGE 7
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#define SPITZ_SCP_JK_A 8
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#define SPITZ_SCP_ADC_TEMP_ON 9
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#define SPITZ_SCP2_IR_ON 1
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#define SPITZ_SCP2_AKIN_PULLUP 2
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#define SPITZ_SCP2_BACKLIGHT_CONT 7
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#define SPITZ_SCP2_BACKLIGHT_ON 8
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#define SPITZ_SCP2_MIC_BIAS 9
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#define SPITZ_SCP_LED_GREEN 1
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#define SPITZ_SCP_JK_B 2
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#define SPITZ_SCP_CHRG_ON 3
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#define SPITZ_SCP_MUTE_L 4
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#define SPITZ_SCP_MUTE_R 5
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#define SPITZ_SCP_CF_POWER 6
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#define SPITZ_SCP_LED_ORANGE 7
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#define SPITZ_SCP_JK_A 8
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#define SPITZ_SCP_ADC_TEMP_ON 9
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#define SPITZ_SCP2_IR_ON 1
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#define SPITZ_SCP2_AKIN_PULLUP 2
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#define SPITZ_SCP2_BACKLIGHT_CONT 7
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#define SPITZ_SCP2_BACKLIGHT_ON 8
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#define SPITZ_SCP2_MIC_BIAS 9
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static void spitz_scoop_gpio_setup(PXA2xxState *cpu,
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DeviceState *scp0, DeviceState *scp1)
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@ -839,15 +839,15 @@ static void spitz_scoop_gpio_setup(PXA2xxState *cpu,
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qdev_connect_gpio_out(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]);
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}
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#define SPITZ_GPIO_HSYNC 22
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#define SPITZ_GPIO_SD_DETECT 9
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#define SPITZ_GPIO_SD_WP 81
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#define SPITZ_GPIO_ON_RESET 89
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#define SPITZ_GPIO_BAT_COVER 90
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#define SPITZ_GPIO_CF1_IRQ 105
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#define SPITZ_GPIO_CF1_CD 94
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#define SPITZ_GPIO_CF2_IRQ 106
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#define SPITZ_GPIO_CF2_CD 93
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#define SPITZ_GPIO_HSYNC 22
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#define SPITZ_GPIO_SD_DETECT 9
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#define SPITZ_GPIO_SD_WP 81
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#define SPITZ_GPIO_ON_RESET 89
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#define SPITZ_GPIO_BAT_COVER 90
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#define SPITZ_GPIO_CF1_IRQ 105
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#define SPITZ_GPIO_CF1_CD 94
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#define SPITZ_GPIO_CF2_IRQ 106
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#define SPITZ_GPIO_CF2_CD 93
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static int spitz_hsync;
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@ -907,8 +907,8 @@ static void spitz_gpio_setup(PXA2xxState *cpu, int slots)
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/* Board init. */
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enum spitz_model_e { spitz, akita, borzoi, terrier };
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#define SPITZ_RAM 0x04000000
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#define SPITZ_ROM 0x00800000
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#define SPITZ_RAM 0x04000000
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#define SPITZ_ROM 0x00800000
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static struct arm_boot_info spitz_binfo = {
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.loader_start = PXA2XX_SDRAM_BASE,
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