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ide: Introduce abstract QOM type for PCIIDEState 

Needed for QOM casts.

Signed-off-by: Andreas Färber <afaerber@suse.de>
This commit is contained in:
Andreas Färber 2013-07-17 18:44:48 +02:00
parent 02a9594b4f
commit f6c11d5644
5 changed files with 82 additions and 60 deletions
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62
hw/ide/cmd646.c
View File

@ -127,7 +127,7 @@ static uint64_t bmdma_read(void *opaque, hwaddr addr,
unsigned size)
{
BMDMAState *bm = opaque;
PCIIDEState *pci_dev = bm->pci_dev;
PCIDevice *pci_dev = PCI_DEVICE(bm->pci_dev);
uint32_t val;
if (size != 1) {
@ -139,16 +139,16 @@ static uint64_t bmdma_read(void *opaque, hwaddr addr,
val = bm->cmd;
break;
case 1:
val = pci_dev->dev.config[MRDMODE];
val = pci_dev->config[MRDMODE];
break;
case 2:
val = bm->status;
break;
case 3:
if (bm == &pci_dev->bmdma[0]) {
val = pci_dev->dev.config[UDIDETCR0];
if (bm == &bm->pci_dev->bmdma[0]) {
val = pci_dev->config[UDIDETCR0];
} else {
val = pci_dev->dev.config[UDIDETCR1];
val = pci_dev->config[UDIDETCR1];
}
break;
default:
@ -165,7 +165,7 @@ static void bmdma_write(void *opaque, hwaddr addr,
uint64_t val, unsigned size)
{
BMDMAState *bm = opaque;
PCIIDEState *pci_dev = bm->pci_dev;
PCIDevice *pci_dev = PCI_DEVICE(bm->pci_dev);
if (size != 1) {
return;
@ -179,18 +179,19 @@ static void bmdma_write(void *opaque, hwaddr addr,
bmdma_cmd_writeb(bm, val);
break;
case 1:
pci_dev->dev.config[MRDMODE] =
(pci_dev->dev.config[MRDMODE] & ~0x30) | (val & 0x30);
cmd646_update_irq(pci_dev);
pci_dev->config[MRDMODE] =
(pci_dev->config[MRDMODE] & ~0x30) | (val & 0x30);
cmd646_update_irq(bm->pci_dev);
break;
case 2:
bm->status = (val & 0x60) | (bm->status & 1) | (bm->status & ~val & 0x06);
break;
case 3:
if (bm == &pci_dev->bmdma[0])
pci_dev->dev.config[UDIDETCR0] = val;
else
pci_dev->dev.config[UDIDETCR1] = val;
if (bm == &bm->pci_dev->bmdma[0]) {
pci_dev->config[UDIDETCR0] = val;
} else {
pci_dev->config[UDIDETCR1] = val;
}
break;
}
}
@ -222,25 +223,29 @@ static void bmdma_setup_bar(PCIIDEState *d)
registers */
static void cmd646_update_irq(PCIIDEState *d)
{
PCIDevice *pd = PCI_DEVICE(d);
int pci_level;
pci_level = ((d->dev.config[MRDMODE] & MRDMODE_INTR_CH0) &&
!(d->dev.config[MRDMODE] & MRDMODE_BLK_CH0)) ||
((d->dev.config[MRDMODE] & MRDMODE_INTR_CH1) &&
!(d->dev.config[MRDMODE] & MRDMODE_BLK_CH1));
qemu_set_irq(d->dev.irq[0], pci_level);
pci_level = ((pd->config[MRDMODE] & MRDMODE_INTR_CH0) &&
!(pd->config[MRDMODE] & MRDMODE_BLK_CH0)) ||
((pd->config[MRDMODE] & MRDMODE_INTR_CH1) &&
!(pd->config[MRDMODE] & MRDMODE_BLK_CH1));
qemu_set_irq(pd->irq[0], pci_level);
}
/* the PCI irq level is the logical OR of the two channels */
static void cmd646_set_irq(void *opaque, int channel, int level)
{
PCIIDEState *d = opaque;
PCIDevice *pd = PCI_DEVICE(d);
int irq_mask;
irq_mask = MRDMODE_INTR_CH0 << channel;
if (level)
d->dev.config[MRDMODE] |= irq_mask;
else
d->dev.config[MRDMODE] &= ~irq_mask;
if (level) {
pd->config[MRDMODE] |= irq_mask;
} else {
pd->config[MRDMODE] &= ~irq_mask;
}
cmd646_update_irq(d);
}
@ -257,8 +262,8 @@ static void cmd646_reset(void *opaque)
/* CMD646 PCI IDE controller */
static int pci_cmd646_ide_initfn(PCIDevice *dev)
{
PCIIDEState *d = DO_UPCAST(PCIIDEState, dev, dev);
uint8_t *pci_conf = d->dev.config;
PCIIDEState *d = PCI_IDE(dev);
uint8_t *pci_conf = dev->config;
qemu_irq *irq;
int i;
@ -284,7 +289,7 @@ static int pci_cmd646_ide_initfn(PCIDevice *dev)
irq = qemu_allocate_irqs(cmd646_set_irq, d, 2);
for (i = 0; i < 2; i++) {
ide_bus_new(&d->bus[i], &d->dev.qdev, i, 2);
ide_bus_new(&d->bus[i], DEVICE(dev), i, 2);
ide_init2(&d->bus[i], irq[i]);
bmdma_init(&d->bus[i], &d->bmdma[i], d);
@ -293,14 +298,14 @@ static int pci_cmd646_ide_initfn(PCIDevice *dev)
&d->bmdma[i].dma);
}
vmstate_register(&dev->qdev, 0, &vmstate_ide_pci, d);
vmstate_register(DEVICE(dev), 0, &vmstate_ide_pci, d);
qemu_register_reset(cmd646_reset, d);
return 0;
}
static void pci_cmd646_ide_exitfn(PCIDevice *dev)
{
PCIIDEState *d = DO_UPCAST(PCIIDEState, dev, dev);
PCIIDEState *d = PCI_IDE(dev);
unsigned i;
for (i = 0; i < 2; ++i) {
@ -347,8 +352,7 @@ static void cmd646_ide_class_init(ObjectClass *klass, void *data)
static const TypeInfo cmd646_ide_info = {
.name = "cmd646-ide",
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(PCIIDEState),
.parent = TYPE_PCI_IDE,
.class_init = cmd646_ide_class_init,
};

30
hw/ide/pci.c
View File

@ -56,13 +56,14 @@ static int bmdma_prepare_buf(IDEDMA *dma, int is_write)
{
BMDMAState *bm = DO_UPCAST(BMDMAState, dma, dma);
IDEState *s = bmdma_active_if(bm);
PCIDevice *pci_dev = PCI_DEVICE(bm->pci_dev);
struct {
uint32_t addr;
uint32_t size;
} prd;
int l, len;
pci_dma_sglist_init(&s->sg, &bm->pci_dev->dev,
pci_dma_sglist_init(&s->sg, pci_dev,
s->nsector / (BMDMA_PAGE_SIZE / 512) + 1);
s->io_buffer_size = 0;
for(;;) {
@ -71,7 +72,7 @@ static int bmdma_prepare_buf(IDEDMA *dma, int is_write)
if (bm->cur_prd_last ||
(bm->cur_addr - bm->addr) >= BMDMA_PAGE_SIZE)
return s->io_buffer_size != 0;
pci_dma_read(&bm->pci_dev->dev, bm->cur_addr, &prd, 8);
pci_dma_read(pci_dev, bm->cur_addr, &prd, 8);
bm->cur_addr += 8;
prd.addr = le32_to_cpu(prd.addr);
prd.size = le32_to_cpu(prd.size);
@ -98,6 +99,7 @@ static int bmdma_rw_buf(IDEDMA *dma, int is_write)
{
BMDMAState *bm = DO_UPCAST(BMDMAState, dma, dma);
IDEState *s = bmdma_active_if(bm);
PCIDevice *pci_dev = PCI_DEVICE(bm->pci_dev);
struct {
uint32_t addr;
uint32_t size;
@ -113,7 +115,7 @@ static int bmdma_rw_buf(IDEDMA *dma, int is_write)
if (bm->cur_prd_last ||
(bm->cur_addr - bm->addr) >= BMDMA_PAGE_SIZE)
return 0;
pci_dma_read(&bm->pci_dev->dev, bm->cur_addr, &prd, 8);
pci_dma_read(pci_dev, bm->cur_addr, &prd, 8);
bm->cur_addr += 8;
prd.addr = le32_to_cpu(prd.addr);
prd.size = le32_to_cpu(prd.size);
@ -128,10 +130,10 @@ static int bmdma_rw_buf(IDEDMA *dma, int is_write)
l = bm->cur_prd_len;
if (l > 0) {
if (is_write) {
pci_dma_write(&bm->pci_dev->dev, bm->cur_prd_addr,
pci_dma_write(pci_dev, bm->cur_prd_addr,
s->io_buffer + s->io_buffer_index, l);
} else {
pci_dma_read(&bm->pci_dev->dev, bm->cur_prd_addr,
pci_dma_read(pci_dev, bm->cur_prd_addr,
s->io_buffer + s->io_buffer_index, l);
}
bm->cur_prd_addr += l;
@ -480,7 +482,7 @@ const VMStateDescription vmstate_ide_pci = {
.minimum_version_id_old = 0,
.post_load = ide_pci_post_load,
.fields = (VMStateField []) {
VMSTATE_PCI_DEVICE(dev, PCIIDEState),
VMSTATE_PCI_DEVICE(parent_obj, PCIIDEState),
VMSTATE_STRUCT_ARRAY(bmdma, PCIIDEState, 2, 0,
vmstate_bmdma, BMDMAState),
VMSTATE_IDE_BUS_ARRAY(bus, PCIIDEState, 2),
@ -492,7 +494,7 @@ const VMStateDescription vmstate_ide_pci = {
void pci_ide_create_devs(PCIDevice *dev, DriveInfo **hd_table)
{
PCIIDEState *d = DO_UPCAST(PCIIDEState, dev, dev);
PCIIDEState *d = PCI_IDE(dev);
static const int bus[4] = { 0, 0, 1, 1 };
static const int unit[4] = { 0, 1, 0, 1 };
int i;
@ -531,3 +533,17 @@ void bmdma_init(IDEBus *bus, BMDMAState *bm, PCIIDEState *d)
bus->irq = *irq;
bm->pci_dev = d;
}
static const TypeInfo pci_ide_type_info = {
.name = TYPE_PCI_IDE,
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(PCIIDEState),
.abstract = true,
};
static void pci_ide_register_types(void)
{
type_register_static(&pci_ide_type_info);
}
type_init(pci_ide_register_types)

8
hw/ide/pci.h
View File

@ -37,8 +37,14 @@ typedef struct CMD646BAR {
struct PCIIDEState *pci_dev;
} CMD646BAR;
#define TYPE_PCI_IDE "pci-ide"
#define PCI_IDE(obj) OBJECT_CHECK(PCIIDEState, (obj), TYPE_PCI_IDE)
typedef struct PCIIDEState {
PCIDevice dev;
/*< private >*/
PCIDevice parent_obj;
/*< public >*/
IDEBus bus[2];
BMDMAState bmdma[2];
uint32_t secondary; /* used only for cmd646 */

24
hw/ide/piix.c
View File

@ -106,7 +106,8 @@ static void bmdma_setup_bar(PCIIDEState *d)
static void piix3_reset(void *opaque)
{
PCIIDEState *d = opaque;
uint8_t *pci_conf = d->dev.config;
PCIDevice *pd = PCI_DEVICE(d);
uint8_t *pci_conf = pd->config;
int i;
for (i = 0; i < 2; i++) {
@ -149,15 +150,15 @@ static void pci_piix_init_ports(PCIIDEState *d) {
static int pci_piix_ide_initfn(PCIDevice *dev)
{
PCIIDEState *d = DO_UPCAST(PCIIDEState, dev, dev);
uint8_t *pci_conf = d->dev.config;
PCIIDEState *d = PCI_IDE(dev);
uint8_t *pci_conf = dev->config;
pci_conf[PCI_CLASS_PROG] = 0x80; // legacy ATA mode
qemu_register_reset(piix3_reset, d);
bmdma_setup_bar(d);
pci_register_bar(&d->dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &d->bmdma_bar);
pci_register_bar(dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &d->bmdma_bar);
vmstate_register(DEVICE(dev), 0, &vmstate_ide_pci, d);
@ -168,13 +169,11 @@ static int pci_piix_ide_initfn(PCIDevice *dev)
static int pci_piix3_xen_ide_unplug(DeviceState *dev)
{
PCIDevice *pci_dev;
PCIIDEState *pci_ide;
DriveInfo *di;
int i = 0;
pci_dev = PCI_DEVICE(dev);
pci_ide = DO_UPCAST(PCIIDEState, dev, pci_dev);
pci_ide = PCI_IDE(dev);
for (; i < 3; i++) {
di = drive_get_by_index(IF_IDE, i);
@ -203,7 +202,7 @@ PCIDevice *pci_piix3_xen_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn)
static void pci_piix_ide_exitfn(PCIDevice *dev)
{
PCIIDEState *d = DO_UPCAST(PCIIDEState, dev, dev);
PCIIDEState *d = PCI_IDE(dev);
unsigned i;
for (i = 0; i < 2; ++i) {
@ -254,8 +253,7 @@ static void piix3_ide_class_init(ObjectClass *klass, void *data)
static const TypeInfo piix3_ide_info = {
.name = "piix3-ide",
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(PCIIDEState),
.parent = TYPE_PCI_IDE,
.class_init = piix3_ide_class_init,
};
@ -275,8 +273,7 @@ static void piix3_ide_xen_class_init(ObjectClass *klass, void *data)
static const TypeInfo piix3_ide_xen_info = {
.name = "piix3-ide-xen",
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(PCIIDEState),
.parent = TYPE_PCI_IDE,
.class_init = piix3_ide_xen_class_init,
};
@ -297,8 +294,7 @@ static void piix4_ide_class_init(ObjectClass *klass, void *data)
static const TypeInfo piix4_ide_info = {
.name = "piix4-ide",
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(PCIIDEState),
.parent = TYPE_PCI_IDE,
.class_init = piix4_ide_class_init,
};

18
hw/ide/via.c
View File

@ -108,7 +108,8 @@ static void bmdma_setup_bar(PCIIDEState *d)
static void via_reset(void *opaque)
{
PCIIDEState *d = opaque;
uint8_t *pci_conf = d->dev.config;
PCIDevice *pd = PCI_DEVICE(d);
uint8_t *pci_conf = pd->config;
int i;
for (i = 0; i < 2; i++) {
@ -158,7 +159,7 @@ static void vt82c686b_init_ports(PCIIDEState *d) {
int i;
for (i = 0; i < 2; i++) {
ide_bus_new(&d->bus[i], &d->dev.qdev, i, 2);
ide_bus_new(&d->bus[i], DEVICE(d), i, 2);
ide_init_ioport(&d->bus[i], NULL, port_info[i].iobase,
port_info[i].iobase2);
ide_init2(&d->bus[i], isa_get_irq(NULL, port_info[i].isairq));
@ -173,17 +174,17 @@ static void vt82c686b_init_ports(PCIIDEState *d) {
/* via ide func */
static int vt82c686b_ide_initfn(PCIDevice *dev)
{
PCIIDEState *d = DO_UPCAST(PCIIDEState, dev, dev);
uint8_t *pci_conf = d->dev.config;
PCIIDEState *d = PCI_IDE(dev);
uint8_t *pci_conf = dev->config;
pci_config_set_prog_interface(pci_conf, 0x8a); /* legacy ATA mode */
pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x000000c0);
qemu_register_reset(via_reset, d);
bmdma_setup_bar(d);
pci_register_bar(&d->dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &d->bmdma_bar);
pci_register_bar(dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &d->bmdma_bar);
vmstate_register(&dev->qdev, 0, &vmstate_ide_pci, d);
vmstate_register(DEVICE(dev), 0, &vmstate_ide_pci, d);
vt82c686b_init_ports(d);
@ -192,7 +193,7 @@ static int vt82c686b_ide_initfn(PCIDevice *dev)
static void vt82c686b_ide_exitfn(PCIDevice *dev)
{
PCIIDEState *d = DO_UPCAST(PCIIDEState, dev, dev);
PCIIDEState *d = PCI_IDE(dev);
unsigned i;
for (i = 0; i < 2; ++i) {
@ -229,8 +230,7 @@ static void via_ide_class_init(ObjectClass *klass, void *data)
static const TypeInfo via_ide_info = {
.name = "via-ide",
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(PCIIDEState),
.parent = TYPE_PCI_IDE,
.class_init = via_ide_class_init,
};