s390x/tcg: wire up pci instructions
On s390x, pci support is implemented via a set of instructions (no mmio). Unfortunately, none of them are documented in the PoP; the code is based upon the existing implementation for KVM and the Linux zpci driver. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
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@ -173,4 +173,13 @@ DEF_HELPER_3(stsch, void, env, i64, i64)
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DEF_HELPER_2(tpi, i32, env, i64)
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DEF_HELPER_3(tsch, void, env, i64, i64)
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DEF_HELPER_2(chsc, void, env, i64)
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DEF_HELPER_2(clp, void, env, i32)
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DEF_HELPER_3(pcilg, void, env, i32, i32)
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DEF_HELPER_3(pcistg, void, env, i32, i32)
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DEF_HELPER_4(stpcifc, void, env, i32, i64, i32)
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DEF_HELPER_3(sic, void, env, i64, i64)
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DEF_HELPER_3(rpcit, void, env, i32, i32)
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DEF_HELPER_5(pcistb, void, env, i32, i32, i64, i32)
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DEF_HELPER_4(mpcifc, void, env, i32, i64, i32)
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#endif
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@ -1068,4 +1068,17 @@
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/* ??? Not listed in PoO ninth edition, but there's a linux driver that
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uses it: "A CHSC subchannel is usually present on LPAR only." */
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C(0xb25f, CHSC, RRE, Z, 0, insn, 0, 0, chsc, 0)
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/* zPCI Instructions */
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/* None of these instructions are documented in the PoP, so this is all
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based upon target/s390x/kvm.c and Linux code and likely incomplete */
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C(0xebd0, PCISTB, RSY_a, PCI, la2, 0, 0, 0, pcistb, 0)
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C(0xebd1, SIC, RSY_a, AIS, r1, r3, 0, 0, sic, 0)
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C(0xb9a0, CLP, RRF_c, PCI, 0, 0, 0, 0, clp, 0)
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C(0xb9d0, PCISTG, RRE, PCI, 0, 0, 0, 0, pcistg, 0)
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C(0xb9d2, PCILG, RRE, PCI, 0, 0, 0, 0, pcilg, 0)
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C(0xb9d3, RPCIT, RRE, PCI, 0, 0, 0, 0, rpcit, 0)
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C(0xe3d0, MPCIFC, RXY_a, PCI, la2, 0, 0, 0, mpcifc, 0)
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C(0xe3d4, STPCIFC, RXY_a, PCI, la2, 0, 0, 0, stpcifc, 0)
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#endif /* CONFIG_USER_ONLY */
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@ -38,6 +38,7 @@
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#include "hw/s390x/sclp.h"
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#include "hw/s390x/s390_flic.h"
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#include "hw/s390x/ioinst.h"
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#include "hw/s390x/s390-pci-inst.h"
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#include "hw/boards.h"
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#endif
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@ -632,3 +633,91 @@ uint32_t HELPER(stfle)(CPUS390XState *env, uint64_t addr)
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env->regs[0] = deposit64(env->regs[0], 0, 8, (max_bytes / 8) - 1);
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return count_bytes >= max_bytes ? 0 : 3;
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}
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#ifndef CONFIG_USER_ONLY
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/*
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* Note: we ignore any return code of the functions called for the pci
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* instructions, as the only time they return !0 is when the stub is
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* called, and in that case we didn't even offer the zpci facility.
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* The only exception is SIC, where program checks need to be handled
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* by the caller.
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*/
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void HELPER(clp)(CPUS390XState *env, uint32_t r2)
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{
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S390CPU *cpu = s390_env_get_cpu(env);
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qemu_mutex_lock_iothread();
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clp_service_call(cpu, r2, GETPC());
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qemu_mutex_unlock_iothread();
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}
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void HELPER(pcilg)(CPUS390XState *env, uint32_t r1, uint32_t r2)
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{
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S390CPU *cpu = s390_env_get_cpu(env);
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qemu_mutex_lock_iothread();
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pcilg_service_call(cpu, r1, r2, GETPC());
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qemu_mutex_unlock_iothread();
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}
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void HELPER(pcistg)(CPUS390XState *env, uint32_t r1, uint32_t r2)
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{
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S390CPU *cpu = s390_env_get_cpu(env);
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qemu_mutex_lock_iothread();
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pcistg_service_call(cpu, r1, r2, GETPC());
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qemu_mutex_unlock_iothread();
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}
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void HELPER(stpcifc)(CPUS390XState *env, uint32_t r1, uint64_t fiba,
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uint32_t ar)
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{
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S390CPU *cpu = s390_env_get_cpu(env);
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qemu_mutex_lock_iothread();
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stpcifc_service_call(cpu, r1, fiba, ar, GETPC());
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qemu_mutex_unlock_iothread();
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}
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void HELPER(sic)(CPUS390XState *env, uint64_t r1, uint64_t r3)
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{
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int r;
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qemu_mutex_lock_iothread();
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r = css_do_sic(env, (r3 >> 27) & 0x7, r1 & 0xffff);
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qemu_mutex_unlock_iothread();
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/* css_do_sic() may actually return a PGM_xxx value to inject */
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if (r) {
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s390_program_interrupt(env, -r, 4, GETPC());
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}
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}
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void HELPER(rpcit)(CPUS390XState *env, uint32_t r1, uint32_t r2)
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{
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S390CPU *cpu = s390_env_get_cpu(env);
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qemu_mutex_lock_iothread();
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rpcit_service_call(cpu, r1, r2, GETPC());
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qemu_mutex_unlock_iothread();
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}
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void HELPER(pcistb)(CPUS390XState *env, uint32_t r1, uint32_t r3,
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uint64_t gaddr, uint32_t ar)
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{
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S390CPU *cpu = s390_env_get_cpu(env);
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qemu_mutex_lock_iothread();
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pcistb_service_call(cpu, r1, r3, gaddr, ar, GETPC());
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qemu_mutex_unlock_iothread();
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}
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void HELPER(mpcifc)(CPUS390XState *env, uint32_t r1, uint64_t fiba,
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uint32_t ar)
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{
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S390CPU *cpu = s390_env_get_cpu(env);
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qemu_mutex_lock_iothread();
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mpcifc_service_call(cpu, r1, fiba, ar, GETPC());
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qemu_mutex_unlock_iothread();
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}
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#endif
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@ -4785,6 +4785,106 @@ static ExitStatus op_zero2(DisasContext *s, DisasOps *o)
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return NO_EXIT;
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}
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#ifndef CONFIG_USER_ONLY
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static ExitStatus op_clp(DisasContext *s, DisasOps *o)
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{
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TCGv_i32 r2 = tcg_const_i32(get_field(s->fields, r2));
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check_privileged(s);
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gen_helper_clp(cpu_env, r2);
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tcg_temp_free_i32(r2);
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set_cc_static(s);
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return NO_EXIT;
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}
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static ExitStatus op_pcilg(DisasContext *s, DisasOps *o)
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{
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TCGv_i32 r1 = tcg_const_i32(get_field(s->fields, r1));
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TCGv_i32 r2 = tcg_const_i32(get_field(s->fields, r2));
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check_privileged(s);
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gen_helper_pcilg(cpu_env, r1, r2);
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tcg_temp_free_i32(r1);
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tcg_temp_free_i32(r2);
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set_cc_static(s);
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return NO_EXIT;
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}
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static ExitStatus op_pcistg(DisasContext *s, DisasOps *o)
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{
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TCGv_i32 r1 = tcg_const_i32(get_field(s->fields, r1));
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TCGv_i32 r2 = tcg_const_i32(get_field(s->fields, r2));
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check_privileged(s);
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gen_helper_pcistg(cpu_env, r1, r2);
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tcg_temp_free_i32(r1);
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tcg_temp_free_i32(r2);
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set_cc_static(s);
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return NO_EXIT;
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}
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static ExitStatus op_stpcifc(DisasContext *s, DisasOps *o)
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{
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TCGv_i32 r1 = tcg_const_i32(get_field(s->fields, r1));
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TCGv_i32 ar = tcg_const_i32(get_field(s->fields, b2));
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check_privileged(s);
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gen_helper_stpcifc(cpu_env, r1, o->addr1, ar);
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tcg_temp_free_i32(ar);
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tcg_temp_free_i32(r1);
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set_cc_static(s);
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return NO_EXIT;
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}
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static ExitStatus op_sic(DisasContext *s, DisasOps *o)
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{
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check_privileged(s);
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gen_helper_sic(cpu_env, o->in1, o->in2);
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return NO_EXIT;
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}
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static ExitStatus op_rpcit(DisasContext *s, DisasOps *o)
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{
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TCGv_i32 r1 = tcg_const_i32(get_field(s->fields, r1));
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TCGv_i32 r2 = tcg_const_i32(get_field(s->fields, r2));
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check_privileged(s);
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gen_helper_rpcit(cpu_env, r1, r2);
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tcg_temp_free_i32(r1);
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tcg_temp_free_i32(r2);
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set_cc_static(s);
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return NO_EXIT;
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}
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static ExitStatus op_pcistb(DisasContext *s, DisasOps *o)
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{
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TCGv_i32 r1 = tcg_const_i32(get_field(s->fields, r1));
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TCGv_i32 r3 = tcg_const_i32(get_field(s->fields, r3));
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TCGv_i32 ar = tcg_const_i32(get_field(s->fields, b2));
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check_privileged(s);
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gen_helper_pcistb(cpu_env, r1, r3, o->addr1, ar);
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tcg_temp_free_i32(ar);
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tcg_temp_free_i32(r1);
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tcg_temp_free_i32(r3);
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set_cc_static(s);
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return NO_EXIT;
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}
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static ExitStatus op_mpcifc(DisasContext *s, DisasOps *o)
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{
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TCGv_i32 r1 = tcg_const_i32(get_field(s->fields, r1));
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TCGv_i32 ar = tcg_const_i32(get_field(s->fields, b2));
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check_privileged(s);
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gen_helper_mpcifc(cpu_env, r1, o->addr1, ar);
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tcg_temp_free_i32(ar);
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tcg_temp_free_i32(r1);
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set_cc_static(s);
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return NO_EXIT;
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}
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#endif
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/* ====================================================================== */
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/* The "Cc OUTput" generators. Given the generated output (and in some cases
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the original inputs), update the various cc data structures in order to
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@ -5716,6 +5816,8 @@ enum DisasInsnEnum {
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#define FAC_MSA4 S390_FEAT_MSA_EXT_4 /* msa-extension-4 facility */
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#define FAC_MSA5 S390_FEAT_MSA_EXT_5 /* msa-extension-5 facility */
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#define FAC_ECT S390_FEAT_EXTRACT_CPU_TIME
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#define FAC_PCI S390_FEAT_ZPCI /* z/PCI facility */
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#define FAC_AIS S390_FEAT_ADAPTER_INT_SUPPRESSION
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static const DisasInsn insn_info[] = {
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#include "insn-data.def"
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