target/ppc: Clean up ifdefs in excp_helper.c, part 1
Use #ifdef, #ifndef for brevity and add comments to #endif that are more than a few lines apart for clarity. Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
This commit is contained in:
BALATON Zoltan
Nicholas Piggin
parent
d54b82a481
commit
f6c2d68bac
@ -35,7 +35,7 @@
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/*****************************************************************************/
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/* Exception processing */
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#if !defined(CONFIG_USER_ONLY)
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#ifndef CONFIG_USER_ONLY
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static const char *powerpc_excp_name(int excp)
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{
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@ -186,7 +186,7 @@ static void ppc_excp_debug_sw_tlb(CPUPPCState *env, int excp)
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env->error_code);
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}
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#if defined(TARGET_PPC64)
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#ifdef TARGET_PPC64
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static int powerpc_reset_wakeup(CPUPPCState *env, int excp, target_ulong *msr)
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{
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/* We no longer are in a PM state */
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@ -380,7 +380,7 @@ static void ppc_excp_apply_ail(PowerPCCPU *cpu, int excp, target_ulong msr,
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}
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}
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}
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#endif
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#endif /* TARGET_PPC64 */
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static void powerpc_reset_excp_state(PowerPCCPU *cpu)
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{
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@ -1163,7 +1163,7 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int excp)
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break;
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}
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#if defined(TARGET_PPC64)
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#ifdef TARGET_PPC64
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if (env->spr[SPR_BOOKE_EPCR] & EPCR_ICM) {
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/* Cat.64-bit: EPCR.ICM is copied to MSR.CM */
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new_msr |= (target_ulong)1 << MSR_CM;
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@ -1594,7 +1594,7 @@ static inline void powerpc_excp_books(PowerPCCPU *cpu, int excp)
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{
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g_assert_not_reached();
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}
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#endif
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#endif /* TARGET_PPC64 */
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static void powerpc_excp(PowerPCCPU *cpu, int excp)
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{
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@ -1645,7 +1645,7 @@ void ppc_cpu_do_interrupt(CPUState *cs)
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powerpc_excp(cpu, cs->exception_index);
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}
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#if defined(TARGET_PPC64)
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#ifdef TARGET_PPC64
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#define P7_UNUSED_INTERRUPTS \
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(PPC_INTERRUPT_RESET | PPC_INTERRUPT_HVIRT | PPC_INTERRUPT_CEXT | \
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PPC_INTERRUPT_WDT | PPC_INTERRUPT_CDOORBELL | PPC_INTERRUPT_FIT | \
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@ -1976,7 +1976,7 @@ static int p9_next_unmasked_interrupt(CPUPPCState *env)
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return 0;
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}
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#endif
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#endif /* TARGET_PPC64 */
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static int ppc_next_unmasked_interrupt_generic(CPUPPCState *env)
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{
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@ -2093,7 +2093,7 @@ static int ppc_next_unmasked_interrupt_generic(CPUPPCState *env)
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static int ppc_next_unmasked_interrupt(CPUPPCState *env)
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{
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switch (env->excp_model) {
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#if defined(TARGET_PPC64)
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#ifdef TARGET_PPC64
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case POWERPC_EXCP_POWER7:
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return p7_next_unmasked_interrupt(env);
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case POWERPC_EXCP_POWER8:
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@ -2132,7 +2132,7 @@ void ppc_maybe_interrupt(CPUPPCState *env)
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}
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}
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#if defined(TARGET_PPC64)
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#ifdef TARGET_PPC64
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static void p7_deliver_interrupt(CPUPPCState *env, int interrupt)
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{
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PowerPCCPU *cpu = env_archcpu(env);
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@ -2334,7 +2334,7 @@ static void p9_deliver_interrupt(CPUPPCState *env, int interrupt)
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interrupt);
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}
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}
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#endif
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#endif /* TARGET_PPC64 */
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static void ppc_deliver_interrupt_generic(CPUPPCState *env, int interrupt)
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{
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@ -2443,7 +2443,7 @@ static void ppc_deliver_interrupt_generic(CPUPPCState *env, int interrupt)
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static void ppc_deliver_interrupt(CPUPPCState *env, int interrupt)
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{
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switch (env->excp_model) {
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#if defined(TARGET_PPC64)
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#ifdef TARGET_PPC64
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case POWERPC_EXCP_POWER7:
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p7_deliver_interrupt(env, interrupt);
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break;
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@ -2553,9 +2553,9 @@ void helper_raise_exception(CPUPPCState *env, uint32_t exception)
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{
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raise_exception_err_ra(env, exception, 0, 0);
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}
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#endif
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#endif /* CONFIG_TCG */
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#if !defined(CONFIG_USER_ONLY)
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#ifndef CONFIG_USER_ONLY
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#ifdef CONFIG_TCG
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void helper_store_msr(CPUPPCState *env, target_ulong val)
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{
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@ -2572,7 +2572,7 @@ void helper_ppc_maybe_interrupt(CPUPPCState *env)
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ppc_maybe_interrupt(env);
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}
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#if defined(TARGET_PPC64)
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#ifdef TARGET_PPC64
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void helper_scv(CPUPPCState *env, uint32_t lev)
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{
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if (env->spr[SPR_FSCR] & (1ull << FSCR_SCV)) {
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@ -2600,7 +2600,7 @@ void helper_pminsn(CPUPPCState *env, uint32_t insn)
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ppc_maybe_interrupt(env);
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}
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#endif /* defined(TARGET_PPC64) */
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#endif /* TARGET_PPC64 */
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static void do_rfi(CPUPPCState *env, target_ulong nip, target_ulong msr)
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{
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@ -2611,7 +2611,7 @@ static void do_rfi(CPUPPCState *env, target_ulong nip, target_ulong msr)
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if (env->flags & POWERPC_FLAG_TGPR)
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msr &= ~(1ULL << MSR_TGPR);
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#if defined(TARGET_PPC64)
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#ifdef TARGET_PPC64
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/* Switching to 32-bit ? Crop the nip */
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if (!msr_is_64bit(env, msr)) {
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nip = (uint32_t)nip;
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@ -2640,7 +2640,7 @@ void helper_rfi(CPUPPCState *env)
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do_rfi(env, env->spr[SPR_SRR0], env->spr[SPR_SRR1] & 0xfffffffful);
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}
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#if defined(TARGET_PPC64)
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#ifdef TARGET_PPC64
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void helper_rfid(CPUPPCState *env)
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{
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/*
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@ -2661,7 +2661,7 @@ void helper_hrfid(CPUPPCState *env)
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{
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do_rfi(env, env->spr[SPR_HSRR0], env->spr[SPR_HSRR1]);
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}
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#endif
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#endif /* TARGET_PPC64 */
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#if defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY)
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void helper_rfebb(CPUPPCState *env, target_ulong s)
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@ -2738,7 +2738,7 @@ void raise_ebb_perfm_exception(CPUPPCState *env)
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do_ebb(env, POWERPC_EXCP_PERFM_EBB);
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}
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#endif
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#endif /* defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY) */
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/*****************************************************************************/
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/* Embedded PowerPC specific helpers */
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@ -2780,7 +2780,7 @@ void helper_tw(CPUPPCState *env, target_ulong arg1, target_ulong arg2,
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}
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}
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#if defined(TARGET_PPC64)
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#ifdef TARGET_PPC64
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void helper_td(CPUPPCState *env, target_ulong arg1, target_ulong arg2,
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uint32_t flags)
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{
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@ -2793,8 +2793,8 @@ void helper_td(CPUPPCState *env, target_ulong arg1, target_ulong arg2,
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POWERPC_EXCP_TRAP, GETPC());
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}
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}
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#endif
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#endif
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#endif /* TARGET_PPC64 */
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#endif /* CONFIG_TCG */
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#ifdef CONFIG_TCG
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static uint32_t helper_SIMON_LIKE_32_64(uint32_t x, uint64_t key, uint32_t lane)
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@ -2909,8 +2909,7 @@ HELPER_HASH(HASHSTP, env->spr[SPR_HASHPKEYR], true, PHIE)
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HELPER_HASH(HASHCHKP, env->spr[SPR_HASHPKEYR], false, PHIE)
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#endif /* CONFIG_TCG */
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#if !defined(CONFIG_USER_ONLY)
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#ifndef CONFIG_USER_ONLY
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#ifdef CONFIG_TCG
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/* Embedded.Processor Control */
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@ -3019,7 +3018,7 @@ void helper_book3s_msgsnd(target_ulong rb)
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book3s_msgsnd_common(pir, PPC_INTERRUPT_HDOORBELL);
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}
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#if defined(TARGET_PPC64)
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#ifdef TARGET_PPC64
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void helper_book3s_msgclrp(CPUPPCState *env, target_ulong rb)
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{
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helper_hfscr_facility_check(env, HFSCR_MSGP, "msgclrp", HFSCR_IC_MSGP);
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