Merge remote-tracking branch 'mjt/trivial-patches-next' into staging
# By Dong Xu Wang (2) and others # Via Michael Tokarev * mjt/trivial-patches-next: osdep.h: include sys/types.h for ssize_t definition remove double semicolons clean unnecessary code: don't check g_strdup arg for NULL docs: mention AddressSpaces in docs/memory.txt audio: update documentation after removing --audio-card-list option m25p80.c: Sync Flash chip list with Linux bsd-user: OS-agnostic 64-bit SYSCTL types Message-id: 518F61B9.9050803@msgid.tls.msk.ru Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
commit
f6e136e47a
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@ -609,7 +609,7 @@ static int nbd_co_discard(BlockDriverState *bs, int64_t sector_num,
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return 0;
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}
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request.type = NBD_CMD_TRIM;
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request.from = sector_num * 512;;
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request.from = sector_num * 512;
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request.len = nb_sectors * 512;
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nbd_coroutine_start(s, &request);
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@ -211,10 +211,11 @@ static int sysctl_oldcvt(void *holdp, size_t holdlen, uint32_t kind)
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*(uint64_t *)holdp = tswap64(*(unsigned long *)holdp);
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break;
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#endif
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#if !defined(__FreeBSD_version) || __FreeBSD_version < 900031
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case CTLTYPE_QUAD:
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#else
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#ifdef CTLTYPE_U64
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case CTLTYPE_S64:
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case CTLTYPE_U64:
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#else
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case CTLTYPE_QUAD:
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#endif
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*(uint64_t *)holdp = tswap64(*(uint64_t *)holdp);
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break;
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@ -15,10 +15,13 @@ The memory model provides support for
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- setting up coalesced memory for kvm
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- setting up ioeventfd regions for kvm
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Memory is modelled as a tree (really acyclic graph) of MemoryRegion objects.
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The root of the tree is memory as seen from the CPU's viewpoint (the system
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bus). Nodes in the tree represent other buses, memory controllers, and
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memory regions that have been rerouted. Leaves are RAM and MMIO regions.
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Memory is modelled as an acyclic graph of MemoryRegion objects. Sinks
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(leaves) are RAM and MMIO regions, while other nodes represent
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buses, memory controllers, and memory regions that have been rerouted.
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In addition to MemoryRegion objects, the memory API provides AddressSpace
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objects for every root and possibly for intermediate MemoryRegions too.
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These represent memory as seen from the CPU or a device's viewpoint.
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Types of regions
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----------------
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@ -248,7 +248,7 @@ static int send_fd(int sockfd, int fd)
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static int send_status(int sockfd, struct iovec *iovec, int status)
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{
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ProxyHeader header;
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int retval, msg_size;;
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int retval, msg_size;
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if (status < 0) {
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header.type = T_ERROR;
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@ -381,7 +381,7 @@ static int send_response(int sock, struct iovec *iovec, int size)
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proxy_marshal(iovec, 0, "dd", header.type, header.size);
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retval = socket_write(sock, iovec->iov_base, header.size + PROXY_HDR_SZ);
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if (retval < 0) {
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return retval;;
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return retval;
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}
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return 0;
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}
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@ -878,7 +878,7 @@ static int local_remove(FsContext *ctx, const char *path)
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* Now remove the name from parent directory
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* .virtfs_metadata directory
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*/
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err = remove(local_mapped_attr_path(ctx, path, buffer));;
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err = remove(local_mapped_attr_path(ctx, path, buffer));
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if (err < 0 && errno != ENOENT) {
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/*
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* We didn't had the .virtfs_metadata file. May be file created
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@ -91,18 +91,27 @@ static const FlashPartInfo known_devices[] = {
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{ INFO("at26df161a", 0x1f4601, 0, 64 << 10, 32, ER_4K) },
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{ INFO("at26df321", 0x1f4700, 0, 64 << 10, 64, ER_4K) },
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{ INFO("at45db081d", 0x1f2500, 0, 64 << 10, 16, ER_4K) },
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/* EON -- en25xxx */
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{ INFO("en25f32", 0x1c3116, 0, 64 << 10, 64, ER_4K) },
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{ INFO("en25p32", 0x1c2016, 0, 64 << 10, 64, 0) },
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{ INFO("en25q32b", 0x1c3016, 0, 64 << 10, 64, 0) },
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{ INFO("en25p64", 0x1c2017, 0, 64 << 10, 128, 0) },
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{ INFO("en25q64", 0x1c3017, 0, 64 << 10, 128, ER_4K) },
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/* GigaDevice */
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{ INFO("gd25q32", 0xc84016, 0, 64 << 10, 64, ER_4K) },
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{ INFO("gd25q64", 0xc84017, 0, 64 << 10, 128, ER_4K) },
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/* Intel/Numonyx -- xxxs33b */
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{ INFO("160s33b", 0x898911, 0, 64 << 10, 32, 0) },
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{ INFO("320s33b", 0x898912, 0, 64 << 10, 64, 0) },
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{ INFO("640s33b", 0x898913, 0, 64 << 10, 128, 0) },
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{ INFO("n25q064", 0x20ba17, 0, 64 << 10, 128, 0) },
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/* Macronix */
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{ INFO("mx25l2005a", 0xc22012, 0, 64 << 10, 4, ER_4K) },
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{ INFO("mx25l4005a", 0xc22013, 0, 64 << 10, 8, ER_4K) },
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{ INFO("mx25l8005", 0xc22014, 0, 64 << 10, 16, 0) },
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{ INFO("mx25l1606e", 0xc22015, 0, 64 << 10, 32, ER_4K) },
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@ -113,15 +122,16 @@ static const FlashPartInfo known_devices[] = {
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{ INFO("mx25l25635e", 0xc22019, 0, 64 << 10, 512, 0) },
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{ INFO("mx25l25655e", 0xc22619, 0, 64 << 10, 512, 0) },
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/* Micron */
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{ INFO("n25q128a11", 0x20bb18, 0, 64 << 10, 256, 0) },
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{ INFO("n25q128a13", 0x20ba18, 0, 64 << 10, 256, 0) },
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{ INFO("n25q256a", 0x20ba19, 0, 64 << 10, 512, ER_4K) },
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/* Spansion -- single (large) sector size only, at least
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* for the chips listed here (without boot sectors).
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*/
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{ INFO("s25sl004a", 0x010212, 0, 64 << 10, 8, 0) },
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{ INFO("s25sl008a", 0x010213, 0, 64 << 10, 16, 0) },
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{ INFO("s25sl016a", 0x010214, 0, 64 << 10, 32, 0) },
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{ INFO("s25sl032a", 0x010215, 0, 64 << 10, 64, 0) },
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{ INFO("s25sl032p", 0x010215, 0x4d00, 64 << 10, 64, ER_4K) },
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{ INFO("s25sl064a", 0x010216, 0, 64 << 10, 128, 0) },
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{ INFO("s25sl064p", 0x010216, 0x4d00, 64 << 10, 128, ER_4K) },
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{ INFO("s25fl256s0", 0x010219, 0x4d00, 256 << 10, 128, 0) },
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{ INFO("s25fl256s1", 0x010219, 0x4d01, 64 << 10, 512, 0) },
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{ INFO("s25fl512s", 0x010220, 0x4d00, 256 << 10, 256, 0) },
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@ -130,6 +140,11 @@ static const FlashPartInfo known_devices[] = {
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{ INFO("s25sl12801", 0x012018, 0x0301, 64 << 10, 256, 0) },
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{ INFO("s25fl129p0", 0x012018, 0x4d00, 256 << 10, 64, 0) },
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{ INFO("s25fl129p1", 0x012018, 0x4d01, 64 << 10, 256, 0) },
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{ INFO("s25sl004a", 0x010212, 0, 64 << 10, 8, 0) },
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{ INFO("s25sl008a", 0x010213, 0, 64 << 10, 16, 0) },
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{ INFO("s25sl016a", 0x010214, 0, 64 << 10, 32, 0) },
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{ INFO("s25sl032a", 0x010215, 0, 64 << 10, 64, 0) },
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{ INFO("s25sl064a", 0x010216, 0, 64 << 10, 128, 0) },
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{ INFO("s25fl016k", 0xef4015, 0, 64 << 10, 32, ER_4K | ER_32K) },
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{ INFO("s25fl064k", 0xef4017, 0, 64 << 10, 128, ER_4K | ER_32K) },
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@ -153,11 +168,13 @@ static const FlashPartInfo known_devices[] = {
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{ INFO("m25p32", 0x202016, 0, 64 << 10, 64, 0) },
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{ INFO("m25p64", 0x202017, 0, 64 << 10, 128, 0) },
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{ INFO("m25p128", 0x202018, 0, 256 << 10, 64, 0) },
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{ INFO("n25q032", 0x20ba16, 0, 64 << 10, 64, 0) },
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{ INFO("m45pe10", 0x204011, 0, 64 << 10, 2, 0) },
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{ INFO("m45pe80", 0x204014, 0, 64 << 10, 16, 0) },
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{ INFO("m45pe16", 0x204015, 0, 64 << 10, 32, 0) },
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{ INFO("m25pe20", 0x208012, 0, 64 << 10, 4, 0) },
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{ INFO("m25pe80", 0x208014, 0, 64 << 10, 16, 0) },
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{ INFO("m25pe16", 0x208015, 0, 64 << 10, 32, ER_4K) },
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@ -174,8 +191,12 @@ static const FlashPartInfo known_devices[] = {
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{ INFO("w25x16", 0xef3015, 0, 64 << 10, 32, ER_4K) },
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{ INFO("w25x32", 0xef3016, 0, 64 << 10, 64, ER_4K) },
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{ INFO("w25q32", 0xef4016, 0, 64 << 10, 64, ER_4K) },
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{ INFO("w25q32dw", 0xef6016, 0, 64 << 10, 64, ER_4K) },
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{ INFO("w25x64", 0xef3017, 0, 64 << 10, 128, ER_4K) },
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{ INFO("w25q64", 0xef4017, 0, 64 << 10, 128, ER_4K) },
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{ INFO("w25q80", 0xef5014, 0, 64 << 10, 16, ER_4K) },
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{ INFO("w25q80bl", 0xef4014, 0, 64 << 10, 16, ER_4K) },
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{ INFO("w25q256", 0xef4019, 0, 64 << 10, 512, ER_4K) },
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/* Numonyx -- n25q128 */
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{ INFO("n25q128", 0x20ba18, 0, 64 << 10, 256, 0) },
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@ -128,7 +128,7 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
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q35_host->mch.ram_memory = ram_memory;
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q35_host->mch.pci_address_space = pci_memory;
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q35_host->mch.system_memory = get_system_memory();
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q35_host->mch.address_space_io = get_system_io();;
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q35_host->mch.address_space_io = get_system_io();
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q35_host->mch.below_4g_mem_size = below_4g_mem_size;
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q35_host->mch.above_4g_mem_size = above_4g_mem_size;
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/* pci */
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@ -370,7 +370,7 @@ static void imx_avic_reset(DeviceState *dev)
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static int imx_avic_init(SysBusDevice *dev)
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{
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IMXAVICState *s = FROM_SYSBUS(IMXAVICState, dev);;
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IMXAVICState *s = FROM_SYSBUS(IMXAVICState, dev);
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memory_region_init_io(&s->iomem, &imx_avic_ops, s, "imx_avic", 0x1000);
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sysbus_init_mmio(dev, &s->iomem);
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@ -651,7 +651,7 @@ static void usb_host_handle_reset(USBDevice *dev)
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trace_usb_host_reset(s->bus_num, s->addr);
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usb_host_do_reset(s);;
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usb_host_do_reset(s);
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usb_host_claim_interfaces(s, 0);
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usb_linux_update_endp_table(s);
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usb_host_release_port(s);
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if (s->fd != -1) {
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usb_host_do_reset(s);;
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usb_host_do_reset(s);
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}
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}
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@ -5,8 +5,8 @@
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#include <stdarg.h>
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#include <stddef.h>
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#include <stdbool.h>
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#ifdef __OpenBSD__
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#include <sys/types.h>
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#ifdef __OpenBSD__
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#include <sys/signal.h>
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#endif
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@ -214,10 +214,6 @@ PCI UHCI USB controller and a virtual USB hub.
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SMP is supported with up to 255 CPUs.
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Note that adlib, gus and cs4231a are only available when QEMU was
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configured with --audio-card-list option containing the name(s) of
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required card(s).
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QEMU uses the PC BIOS from the Bochs project and the Plex86/Bochs LGPL
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VGA BIOS.
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@ -268,7 +268,7 @@ static GIOStatus ga_channel_write(GAChannel *c, const char *buf, size_t size,
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GIOStatus ga_channel_write_all(GAChannel *c, const char *buf, size_t size)
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{
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GIOStatus status = G_IO_STATUS_NORMAL;;
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GIOStatus status = G_IO_STATUS_NORMAL;
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size_t count;
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while (size) {
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@ -2162,7 +2162,7 @@ query_params_append (struct QueryParams *ps,
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}
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ps->p[ps->n].name = g_strdup(name);
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ps->p[ps->n].value = value ? g_strdup(value) : NULL;
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ps->p[ps->n].value = g_strdup(value);
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ps->p[ps->n].ignore = 0;
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ps->n++;
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2
vl.c
2
vl.c
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@ -1215,7 +1215,7 @@ void add_boot_device_path(int32_t bootindex, DeviceState *dev,
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node = g_malloc0(sizeof(FWBootEntry));
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node->bootindex = bootindex;
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node->suffix = suffix ? g_strdup(suffix) : NULL;
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node->suffix = g_strdup(suffix);
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node->dev = dev;
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QTAILQ_FOREACH(i, &fw_boot_order, link) {
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