Merge branch 'for-upstream' of git://github.com/mwalle/qemu
* 'for-upstream' of git://github.com/mwalle/qemu: configure: rename OpenGL feature to GLX configure: proper OpenGL/GLX probe target-lm32: use HELPER() macro target-lm32: flush tlb after clearing env target-lm32: remove dead code target-lm32: fix cmpgui and cmpgeui opcodes tests: tcg: lm32: add more test cases target-lm32: don't log cpu state in translation lm32_uart: fix receive buffering milkymist-uart: fix receive buffering lm32-dis: fix NULL pointer dereference target-lm32: fix debug memory access
This commit is contained in:
commit
f7c61bf8fc
34
configure
vendored
34
configure
vendored
@ -217,7 +217,7 @@ spice=""
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rbd=""
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smartcard_nss=""
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usb_redir=""
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opengl=""
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glx=""
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zlib="yes"
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guest_agent="yes"
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want_tools="yes"
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@ -858,9 +858,9 @@ for opt do
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;;
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--enable-vhost-net) vhost_net="yes"
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;;
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--disable-opengl) opengl="no"
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--disable-glx) glx="no"
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;;
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--enable-opengl) opengl="yes"
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--enable-glx) glx="yes"
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;;
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--disable-rbd) rbd="no"
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;;
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@ -2436,23 +2436,23 @@ EOF
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fi
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##########################################
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# opengl probe, used by milkymist-tmu2
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if test "$opengl" != "no" ; then
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opengl_libs="-lGL -lX11"
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# GLX probe, used by milkymist-tmu2
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if test "$glx" != "no" ; then
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glx_libs="-lGL -lX11"
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cat > $TMPC << EOF
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#include <X11/Xlib.h>
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#include <GL/gl.h>
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#include <GL/glx.h>
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int main(void) { return GL_VERSION != 0; }
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int main(void) { glBegin(0); glXQueryVersion(0,0,0); return 0; }
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EOF
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if compile_prog "" "-lGL" ; then
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opengl=yes
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if compile_prog "" "-lGL -lX11" ; then
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glx=yes
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else
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if test "$opengl" = "yes" ; then
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feature_not_found "opengl"
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if test "$glx" = "yes" ; then
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feature_not_found "glx"
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fi
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opengl_libs=
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opengl=no
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glx_libs=
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glx=no
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fi
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fi
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@ -3430,7 +3430,7 @@ echo "rbd support $rbd"
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echo "xfsctl support $xfs"
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echo "nss used $smartcard_nss"
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echo "usb net redir $usb_redir"
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echo "OpenGL support $opengl"
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echo "GLX support $glx"
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echo "libiscsi support $libiscsi"
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echo "build guest agent $guest_agent"
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echo "seccomp support $seccomp"
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@ -3741,8 +3741,8 @@ if test "$usb_redir" = "yes" ; then
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echo "CONFIG_USB_REDIR=y" >> $config_host_mak
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fi
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if test "$opengl" = "yes" ; then
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echo "CONFIG_OPENGL=y" >> $config_host_mak
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if test "$glx" = "yes" ; then
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echo "CONFIG_GLX=y" >> $config_host_mak
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fi
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if test "$libiscsi" = "yes" ; then
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@ -4020,7 +4020,7 @@ case "$target_arch2" in
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target_nptl="yes"
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;;
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lm32)
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target_libs_softmmu="$opengl_libs"
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target_libs_softmmu="$glx_libs"
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;;
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m68k)
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bflt="yes"
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@ -303,11 +303,11 @@ int print_insn_lm32(bfd_vma memaddr, struct disassemble_info *info)
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}
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case 'c': {
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uint8_t csr;
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const char *csr_name;
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const Lm32CsrInfo *info;
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csr = (op >> 21) & 0x1f;
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csr_name = find_csr_info(csr)->name;
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if (csr_name) {
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fprintf_fn(stream, "%s", csr_name);
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info = find_csr_info(csr);
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if (info) {
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fprintf_fn(stream, "%s", info->name);
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} else {
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fprintf_fn(stream, "0x%x", csr);
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}
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@ -11,7 +11,7 @@ obj-y += milkymist-minimac2.o
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obj-y += milkymist-pfpu.o
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obj-y += milkymist-softusb.o
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obj-y += milkymist-sysctl.o
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obj-$(CONFIG_OPENGL) += milkymist-tmu2.o
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obj-$(CONFIG_GLX) += milkymist-tmu2.o
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obj-y += milkymist-uart.o
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obj-y += milkymist-vgafb.o
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obj-y += framebuffer.o
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@ -137,6 +137,7 @@ static uint64_t uart_read(void *opaque, hwaddr addr,
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r = s->regs[R_RXTX];
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s->regs[R_LSR] &= ~LSR_DR;
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uart_update_irq(s);
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qemu_chr_accept_input(s->chr);
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break;
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case R_IIR:
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case R_LSR:
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@ -87,7 +87,7 @@ static inline DeviceState *milkymist_pfpu_create(hwaddr base,
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return dev;
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}
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#ifdef CONFIG_OPENGL
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#ifdef CONFIG_GLX
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#include <X11/Xlib.h>
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#include <GL/glx.h>
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static const int glx_fbconfig_attr[] = {
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@ -101,7 +101,7 @@ static const int glx_fbconfig_attr[] = {
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static inline DeviceState *milkymist_tmu2_create(hwaddr base,
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qemu_irq irq)
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{
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#ifdef CONFIG_OPENGL
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#ifdef CONFIG_GLX
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DeviceState *dev;
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Display *d;
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GLXFBConfig *configs;
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@ -132,6 +132,7 @@ static void uart_write(void *opaque, hwaddr addr, uint64_t value,
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case R_STAT:
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/* write one to clear bits */
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s->regs[addr] &= ~(value & (STAT_RX_EVT | STAT_TX_EVT));
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qemu_chr_accept_input(s->chr);
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break;
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default:
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@ -36,10 +36,10 @@ static void lm32_cpu_reset(CPUState *s)
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lcc->parent_reset(s);
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tlb_flush(env, 1);
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/* reset cpu state */
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memset(env, 0, offsetof(CPULM32State, breakpoints));
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tlb_flush(env, 1);
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}
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static void lm32_cpu_realizefn(DeviceState *dev, Error **errp)
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@ -229,18 +229,8 @@ static inline void cpu_set_tls(CPULM32State *env, target_ulong newtls)
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{
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}
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static inline int cpu_interrupts_enabled(CPULM32State *env)
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{
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return env->ie & IE_IE;
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}
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#include "exec/cpu-all.h"
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static inline target_ulong cpu_get_pc(CPULM32State *env)
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{
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return env->pc;
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}
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static inline void cpu_get_tb_cpu_state(CPULM32State *env, target_ulong *pc,
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target_ulong *cs_base, int *flags)
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{
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@ -39,7 +39,12 @@ int cpu_lm32_handle_mmu_fault(CPULM32State *env, target_ulong address, int rw,
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hwaddr cpu_get_phys_page_debug(CPULM32State *env, target_ulong addr)
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{
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return addr & TARGET_PAGE_MASK;
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addr &= TARGET_PAGE_MASK;
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if (env->flags & LM32_FLAG_IGNORE_MSB) {
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return addr & 0x7fffffff;
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} else {
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return addr;
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}
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}
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void lm32_cpu_do_interrupt(CPUState *cs)
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@ -17,13 +17,13 @@
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#define SHIFT 3
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#include "exec/softmmu_template.h"
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void helper_raise_exception(CPULM32State *env, uint32_t index)
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void HELPER(raise_exception)(CPULM32State *env, uint32_t index)
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{
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env->exception_index = index;
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cpu_loop_exit(env);
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}
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void helper_hlt(CPULM32State *env)
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void HELPER(hlt)(CPULM32State *env)
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{
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CPUState *cs = CPU(lm32_env_get_cpu(env));
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@ -32,42 +32,42 @@ void helper_hlt(CPULM32State *env)
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cpu_loop_exit(env);
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}
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void helper_wcsr_im(CPULM32State *env, uint32_t im)
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void HELPER(wcsr_im)(CPULM32State *env, uint32_t im)
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{
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lm32_pic_set_im(env->pic_state, im);
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}
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void helper_wcsr_ip(CPULM32State *env, uint32_t im)
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void HELPER(wcsr_ip)(CPULM32State *env, uint32_t im)
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{
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lm32_pic_set_ip(env->pic_state, im);
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}
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void helper_wcsr_jtx(CPULM32State *env, uint32_t jtx)
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void HELPER(wcsr_jtx)(CPULM32State *env, uint32_t jtx)
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{
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lm32_juart_set_jtx(env->juart_state, jtx);
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}
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void helper_wcsr_jrx(CPULM32State *env, uint32_t jrx)
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void HELPER(wcsr_jrx)(CPULM32State *env, uint32_t jrx)
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{
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lm32_juart_set_jrx(env->juart_state, jrx);
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}
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uint32_t helper_rcsr_im(CPULM32State *env)
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uint32_t HELPER(rcsr_im)(CPULM32State *env)
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{
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return lm32_pic_get_im(env->pic_state);
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}
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uint32_t helper_rcsr_ip(CPULM32State *env)
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uint32_t HELPER(rcsr_ip)(CPULM32State *env)
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{
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return lm32_pic_get_ip(env->pic_state);
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}
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uint32_t helper_rcsr_jtx(CPULM32State *env)
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uint32_t HELPER(rcsr_jtx)(CPULM32State *env)
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{
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return lm32_juart_get_jtx(env->juart_state);
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}
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uint32_t helper_rcsr_jrx(CPULM32State *env)
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uint32_t HELPER(rcsr_jrx)(CPULM32State *env)
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{
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return lm32_juart_get_jrx(env->juart_state);
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}
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@ -324,10 +324,20 @@ static inline void gen_compare(DisasContext *dc, int cond)
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int rX = (dc->format == OP_FMT_RR) ? dc->r2 : dc->r1;
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int rY = (dc->format == OP_FMT_RR) ? dc->r0 : dc->r0;
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int rZ = (dc->format == OP_FMT_RR) ? dc->r1 : -1;
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int i;
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if (dc->format == OP_FMT_RI) {
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tcg_gen_setcondi_tl(cond, cpu_R[rX], cpu_R[rY],
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sign_extend(dc->imm16, 16));
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switch (cond) {
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case TCG_COND_GEU:
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case TCG_COND_GTU:
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i = zero_extend(dc->imm16, 16);
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break;
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default:
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i = sign_extend(dc->imm16, 16);
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break;
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}
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tcg_gen_setcondi_tl(cond, cpu_R[rX], cpu_R[rY], i);
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} else {
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tcg_gen_setcond_tl(cond, cpu_R[rX], cpu_R[rY], cpu_R[rZ]);
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}
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@ -373,7 +383,7 @@ static void dec_cmpgeu(DisasContext *dc)
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{
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if (dc->format == OP_FMT_RI) {
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LOG_DIS("cmpgeui r%d, r%d, %d\n", dc->r0, dc->r1,
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sign_extend(dc->imm16, 16));
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zero_extend(dc->imm16, 16));
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} else {
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LOG_DIS("cmpgeu r%d, r%d, r%d\n", dc->r2, dc->r0, dc->r1);
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}
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@ -385,7 +395,7 @@ static void dec_cmpgu(DisasContext *dc)
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{
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if (dc->format == OP_FMT_RI) {
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LOG_DIS("cmpgui r%d, r%d, %d\n", dc->r0, dc->r1,
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sign_extend(dc->imm16, 16));
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zero_extend(dc->imm16, 16));
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} else {
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LOG_DIS("cmpgu r%d, r%d, r%d\n", dc->r2, dc->r0, dc->r1);
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}
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@ -1027,11 +1037,6 @@ static void gen_intermediate_code_internal(CPULM32State *env,
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cpu_abort(env, "LM32: unaligned PC=%x\n", pc_start);
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}
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if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
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qemu_log("-----------------------------------------\n");
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log_cpu_state(env, 0);
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}
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next_page_start = (pc_start & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
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lj = -1;
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num_insns = 0;
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@ -52,4 +52,19 @@ mvi r3, 0
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cmpgei r3, r3, 0
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check_r3 1
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test_name CMPGEI_11
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mvi r1, 0
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cmpgei r3, r1, -32768
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check_r3 1
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test_name CMPGEI_12
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mvi r1, -1
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cmpgei r3, r1, -32768
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check_r3 1
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test_name CMPGEI_13
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mvi r1, -32768
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cmpgei r3, r1, -32768
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check_r3 1
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end
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|
@ -52,4 +52,19 @@ mvi r3, 0
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cmpgeui r3, r3, 0
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check_r3 1
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test_name CMPGEUI_11
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mvi r1, 0
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cmpgeui r3, r1, 0x8000
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check_r3 0
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test_name CMPGEUI_12
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mvi r1, -1
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cmpgeui r3, r1, 0x8000
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check_r3 1
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test_name CMPGEUI_13
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ori r1, r0, 0x8000
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cmpgeui r3, r1, 0x8000
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check_r3 1
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end
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|
@ -52,4 +52,19 @@ mvi r3, 0
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cmpgi r3, r3, 0
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check_r3 0
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test_name CMPGI_11
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mvi r1, 0
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cmpgi r3, r1, -32768
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check_r3 1
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test_name CMPGI_12
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mvi r1, -1
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cmpgi r3, r1, -32768
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check_r3 1
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test_name CMPGI_13
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mvi r1, -32768
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cmpgi r3, r1, -32768
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check_r3 0
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end
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|
@ -35,7 +35,7 @@ check_r3 1
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test_name CMPGUI_7
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mvi r1, -1
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cmpgui r3, r1, 0xffff
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check_r3 0
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check_r3 1
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test_name CMPGUI_8
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mvi r3, 0
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@ -52,4 +52,19 @@ mvi r3, 0
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cmpgui r3, r3, 0
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check_r3 0
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test_name CMPGUI_11
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mvi r1, 0
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cmpgui r3, r1, 0x8000
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check_r3 0
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||||
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test_name CMPGUI_12
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mvi r1, -1
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cmpgui r3, r1, 0x8000
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check_r3 1
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||||
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||||
test_name CMPGUI_13
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ori r1, r0, 0x8000
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cmpgui r3, r1, 0x8000
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check_r3 0
|
||||
|
||||
end
|
||||
|
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