tests/tcg/s390x: Test shift instructions
Add a test for each shift instruction in order to to prevent regressions. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Acked-by: David Hildenbrand <david@redhat.com> Message-Id: <20220112165016.226996-6-iii@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
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@ -9,6 +9,7 @@ TESTS+=exrl-trtr
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TESTS+=pack
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TESTS+=mvo
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TESTS+=mvc
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TESTS+=shift
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TESTS+=trap
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TESTS+=signals-s390x
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270
tests/tcg/s390x/shift.c
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270
tests/tcg/s390x/shift.c
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@ -0,0 +1,270 @@
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#include <inttypes.h>
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#include <stdint.h>
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#include <stdio.h>
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#define DEFINE_SHIFT_SINGLE_COMMON(_name, _insn_str) \
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static uint64_t _name(uint64_t op1, uint64_t op2, uint64_t *cc) \
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{ \
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asm(" sll %[cc],28\n" \
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" spm %[cc]\n" \
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" " _insn_str "\n" \
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" ipm %[cc]\n" \
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" srl %[cc],28" \
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: [op1] "+&r" (op1), \
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[cc] "+&r" (*cc) \
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: [op2] "r" (op2) \
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: "cc"); \
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return op1; \
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}
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#define DEFINE_SHIFT_SINGLE_2(_insn, _offset) \
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DEFINE_SHIFT_SINGLE_COMMON(_insn ## _ ## _offset, \
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#_insn " %[op1]," #_offset "(%[op2])")
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#define DEFINE_SHIFT_SINGLE_3(_insn, _offset) \
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DEFINE_SHIFT_SINGLE_COMMON(_insn ## _ ## _offset, \
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#_insn " %[op1],%[op1]," #_offset "(%[op2])")
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#define DEFINE_SHIFT_DOUBLE(_insn, _offset) \
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static uint64_t _insn ## _ ## _offset(uint64_t op1, uint64_t op2, \
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uint64_t *cc) \
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{ \
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uint32_t op1h = op1 >> 32; \
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uint32_t op1l = op1 & 0xffffffff; \
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register uint32_t r2 asm("2") = op1h; \
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register uint32_t r3 asm("3") = op1l; \
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\
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asm(" sll %[cc],28\n" \
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" spm %[cc]\n" \
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" " #_insn " %[r2]," #_offset "(%[op2])\n" \
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" ipm %[cc]\n" \
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" srl %[cc],28" \
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: [r2] "+&r" (r2), \
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[r3] "+&r" (r3), \
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[cc] "+&r" (*cc) \
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: [op2] "r" (op2) \
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: "cc"); \
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op1h = r2; \
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op1l = r3; \
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return (((uint64_t)op1h) << 32) | op1l; \
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}
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DEFINE_SHIFT_SINGLE_3(rll, 0x4cf3b);
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DEFINE_SHIFT_SINGLE_3(rllg, 0x697c9);
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DEFINE_SHIFT_SINGLE_2(sla, 0x4b0);
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DEFINE_SHIFT_SINGLE_2(sla, 0xd54);
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DEFINE_SHIFT_SINGLE_3(slak, 0x2832c);
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DEFINE_SHIFT_SINGLE_3(slag, 0x66cc4);
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DEFINE_SHIFT_SINGLE_3(slag, 0xd54);
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DEFINE_SHIFT_SINGLE_2(sll, 0xd04);
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DEFINE_SHIFT_SINGLE_3(sllk, 0x2699f);
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DEFINE_SHIFT_SINGLE_3(sllg, 0x59df9);
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DEFINE_SHIFT_SINGLE_2(sra, 0x67e);
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DEFINE_SHIFT_SINGLE_3(srak, 0x60943);
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DEFINE_SHIFT_SINGLE_3(srag, 0x6b048);
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DEFINE_SHIFT_SINGLE_2(srl, 0x035);
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DEFINE_SHIFT_SINGLE_3(srlk, 0x43dfc);
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DEFINE_SHIFT_SINGLE_3(srlg, 0x27227);
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DEFINE_SHIFT_DOUBLE(slda, 0x38b);
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DEFINE_SHIFT_DOUBLE(sldl, 0x031);
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DEFINE_SHIFT_DOUBLE(srda, 0x36f);
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DEFINE_SHIFT_DOUBLE(srdl, 0x99a);
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struct shift_test {
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const char *name;
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uint64_t (*insn)(uint64_t, uint64_t, uint64_t *);
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uint64_t op1;
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uint64_t op2;
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uint64_t exp_result;
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uint64_t exp_cc;
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};
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static const struct shift_test tests[] = {
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{
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.name = "rll",
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.insn = rll_0x4cf3b,
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.op1 = 0xecbd589a45c248f5ull,
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.op2 = 0x62e5508ccb4c99fdull,
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.exp_result = 0xecbd589af545c248ull,
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.exp_cc = 0,
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},
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{
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.name = "rllg",
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.insn = rllg_0x697c9,
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.op1 = 0xaa2d54c1b729f7f4ull,
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.op2 = 0x5ffcf7465f5cd71full,
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.exp_result = 0x29f7f4aa2d54c1b7ull,
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.exp_cc = 0,
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},
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{
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.name = "sla-1",
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.insn = sla_0x4b0,
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.op1 = 0x8bf21fb67cca0e96ull,
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.op2 = 0x3ddf2f53347d3030ull,
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.exp_result = 0x8bf21fb600000000ull,
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.exp_cc = 3,
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},
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{
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.name = "sla-2",
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.insn = sla_0xd54,
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.op1 = 0xe4faaed5def0e926ull,
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.op2 = 0x18d586fab239cbeeull,
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.exp_result = 0xe4faaed5fbc3a498ull,
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.exp_cc = 3,
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},
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{
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.name = "slak",
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.insn = slak_0x2832c,
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.op1 = 0x7300bf78707f09f9ull,
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.op2 = 0x4d193b85bb5cb39bull,
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.exp_result = 0x7300bf783f84fc80ull,
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.exp_cc = 3,
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},
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{
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.name = "slag-1",
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.insn = slag_0x66cc4,
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.op1 = 0xe805966de1a77762ull,
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.op2 = 0x0e92953f6aa91c6bull,
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.exp_result = 0xbbb1000000000000ull,
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.exp_cc = 3,
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},
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{
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.name = "slag-2",
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.insn = slag_0xd54,
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.op1 = 0xdef0e92600000000ull,
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.op2 = 0x18d586fab239cbeeull,
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.exp_result = 0xfbc3a49800000000ull,
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.exp_cc = 3,
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},
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{
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.name = "sll",
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.insn = sll_0xd04,
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.op1 = 0xb90281a3105939dfull,
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.op2 = 0xb5e4df7e082e4c5eull,
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.exp_result = 0xb90281a300000000ull,
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.exp_cc = 0,
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},
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{
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.name = "sllk",
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.insn = sllk_0x2699f,
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.op1 = 0x777c6cf116f99557ull,
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.op2 = 0xe0556cf112e5a458ull,
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.exp_result = 0x777c6cf100000000ull,
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.exp_cc = 0,
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},
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{
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.name = "sllg",
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.insn = sllg_0x59df9,
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.op1 = 0xcdf86cbfbc0f3557ull,
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.op2 = 0x325a45acf99c6d3dull,
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.exp_result = 0x55c0000000000000ull,
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.exp_cc = 0,
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},
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{
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.name = "sra",
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.insn = sra_0x67e,
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.op1 = 0xb878f048d5354183ull,
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.op2 = 0x9e27d13195931f79ull,
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.exp_result = 0xb878f048ffffffffull,
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.exp_cc = 1,
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},
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{
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.name = "srak",
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.insn = srak_0x60943,
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.op1 = 0xb6ceb5a429cedb35ull,
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.op2 = 0x352354900ae34d7aull,
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.exp_result = 0xb6ceb5a400000000ull,
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.exp_cc = 0,
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},
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{
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.name = "srag",
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.insn = srag_0x6b048,
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.op1 = 0xd54dd4468676c63bull,
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.op2 = 0x84d026db7b4dca28ull,
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.exp_result = 0xffffffffffffd54dull,
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.exp_cc = 1,
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},
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{
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.name = "srl",
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.insn = srl_0x035,
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.op1 = 0x09be503ef826815full,
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.op2 = 0xbba8d1a0e542d5c1ull,
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.exp_result = 0x9be503e00000000ull,
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.exp_cc = 0,
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},
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{
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.name = "srlk",
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.insn = srlk_0x43dfc,
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.op1 = 0x540d6c8de71aee2aull,
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.op2 = 0x0000000000000000ull,
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.exp_result = 0x540d6c8d00000000ull,
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.exp_cc = 0,
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},
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{
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.name = "srlg",
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.insn = srlg_0x27227,
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.op1 = 0x26f7123c1c447a34ull,
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.op2 = 0x0000000000000000ull,
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.exp_result = 0x00000000004dee24ull,
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.exp_cc = 0,
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},
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{
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.name = "slda",
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.insn = slda_0x38b,
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.op1 = 0x7988f722dd5bbe7cull,
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.op2 = 0x9aed3f95b4d78cc2ull,
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.exp_result = 0x1ee45bab77cf8000ull,
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.exp_cc = 3,
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},
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{
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.name = "sldl",
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.insn = sldl_0x031,
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.op1 = 0xaae2918dce2b049aull,
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.op2 = 0x0000000000000000ull,
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.exp_result = 0x0934000000000000ull,
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.exp_cc = 0,
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},
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{
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.name = "srda",
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.insn = srda_0x36f,
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.op1 = 0x0cd4ed9228a50978ull,
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.op2 = 0x72b046f0848b8cc9ull,
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.exp_result = 0x000000000000000cull,
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.exp_cc = 2,
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},
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{
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.name = "srdl",
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.insn = srdl_0x99a,
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.op1 = 0x1018611c41689a1dull,
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.op2 = 0x2907e150c50ba319ull,
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.exp_result = 0x0000000000000203ull,
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.exp_cc = 0,
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},
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};
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int main(void)
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{
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int ret = 0;
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size_t i;
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for (i = 0; i < sizeof(tests) / sizeof(tests[0]); i++) {
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uint64_t result;
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uint64_t cc = 0;
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result = tests[i].insn(tests[i].op1, tests[i].op2, &cc);
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if (result != tests[i].exp_result) {
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fprintf(stderr,
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"bad %s result:\n"
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"actual = 0x%" PRIx64 "\n"
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"expected = 0x%" PRIx64 "\n",
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tests[i].name, result, tests[i].exp_result);
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ret = 1;
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}
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if (cc != tests[i].exp_cc) {
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fprintf(stderr,
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"bad %s cc:\n"
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"actual = %" PRIu64 "\n"
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"expected = %" PRIu64 "\n",
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tests[i].name, cc, tests[i].exp_cc);
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ret = 1;
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}
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}
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return ret;
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}
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