OpenE2K/qemu-e2k
13
4
Fork 0
Code Issues 4 Pull Requests Projects 2 Releases Activity

hw/openrisc/openrisc_sim: Create machine state for or1ksim

Browse Source 
This will allow us to attach machine state attributes like
the device tree fdt.

Signed-off-by: Stafford Horne <shorne@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
This commit is contained in:
Stafford Horne 2022-02-10 06:22:46 +09:00
parent 4aa2e497a9
commit f85ad231e4
1 changed files with 28 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

30
hw/openrisc/openrisc_sim.c
View File

@ -37,6 +37,18 @@
#define KERNEL_LOAD_ADDR 0x100
#define TYPE_OR1KSIM_MACHINE MACHINE_TYPE_NAME("or1k-sim")
#define OR1KSIM_MACHINE(obj) \
OBJECT_CHECK(Or1ksimState, (obj), TYPE_OR1KSIM_MACHINE)
typedef struct Or1ksimState {
/*< private >*/
MachineState parent_obj;
/*< public >*/
} Or1ksimState;
static struct openrisc_boot_info {
uint32_t bootstrap_pc;
} boot_info;
@ -183,8 +195,10 @@ static void openrisc_sim_init(MachineState *machine)
openrisc_load_kernel(ram_size, kernel_filename);
}
static void openrisc_sim_machine_init(MachineClass *mc)
static void openrisc_sim_machine_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
mc->desc = "or1k simulation";
mc->init = openrisc_sim_init;
mc->max_cpus = 2;
@ -192,4 +206,16 @@ static void openrisc_sim_machine_init(MachineClass *mc)
mc->default_cpu_type = OPENRISC_CPU_TYPE_NAME("or1200");
}
DEFINE_MACHINE("or1k-sim", openrisc_sim_machine_init)
static const TypeInfo or1ksim_machine_typeinfo = {
.name = TYPE_OR1KSIM_MACHINE,
.parent = TYPE_MACHINE,
.class_init = openrisc_sim_machine_init,
.instance_size = sizeof(Or1ksimState),
};
static void or1ksim_machine_init_register_types(void)
{
type_register_static(&or1ksim_machine_typeinfo);
}
type_init(or1ksim_machine_init_register_types)