target/arm: Convert Neon VPADD 3-reg-same insns to decodetree
Convert the Neon integer VPADD 3-reg-same insns to decodetree. These are 'pairwise' operations. (Note that VQRDMLAH, which shares the same primary opcode but has U=1, has already been converted.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200512163904.10918-10-peter.maydell@linaro.org
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@ -152,6 +152,8 @@ VPMAX_U_3s 1111 001 1 0 . .. .... .... 1010 . . . 0 .... @3same_q0
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VPMIN_S_3s 1111 001 0 0 . .. .... .... 1010 . . . 1 .... @3same_q0
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VPMIN_U_3s 1111 001 1 0 . .. .... .... 1010 . . . 1 .... @3same_q0
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VPADD_3s 1111 001 0 0 . .. .... .... 1011 . . . 1 .... @3same_q0
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VQRDMLAH_3s 1111 001 1 0 . .. .... .... 1011 ... 1 .... @3same
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SHA1_3s 1111 001 0 0 . optype:2 .... .... 1100 . 1 . 0 .... \
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@ -990,8 +990,10 @@ static bool do_3same_pair(DisasContext *s, arg_3same *a, NeonGenTwoOpFn *fn)
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#define gen_helper_neon_pmax_u32 tcg_gen_umax_i32
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#define gen_helper_neon_pmin_s32 tcg_gen_smin_i32
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#define gen_helper_neon_pmin_u32 tcg_gen_umin_i32
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#define gen_helper_neon_padd_u32 tcg_gen_add_i32
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DO_3SAME_PAIR(VPMAX_S, pmax_s)
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DO_3SAME_PAIR(VPMIN_S, pmin_s)
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DO_3SAME_PAIR(VPMAX_U, pmax_u)
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DO_3SAME_PAIR(VPMIN_U, pmin_u)
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DO_3SAME_PAIR(VPADD, padd_u)
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@ -5397,13 +5397,6 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
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return 1;
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}
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switch (op) {
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case NEON_3R_VPADD_VQRDMLAH:
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if (!u) {
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break; /* VPADD */
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}
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/* VQRDMLAH : handled by decodetree */
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return 1;
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case NEON_3R_VFM_VQRDMLSH:
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if (!u) {
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/* VFM, VFMS */
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@ -5438,6 +5431,7 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
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case NEON_3R_VQRSHL:
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case NEON_3R_VPMAX:
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case NEON_3R_VPMIN:
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case NEON_3R_VPADD_VQRDMLAH:
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/* Already handled by decodetree */
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return 1;
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}
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@ -5448,9 +5442,6 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
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}
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pairwise = 0;
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switch (op) {
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case NEON_3R_VPADD_VQRDMLAH:
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pairwise = 1;
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break;
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case NEON_3R_FLOAT_ARITH:
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pairwise = (u && size < 2); /* if VPADD (float) */
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break;
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@ -5528,14 +5519,6 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
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}
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}
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break;
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case NEON_3R_VPADD_VQRDMLAH:
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switch (size) {
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case 0: gen_helper_neon_padd_u8(tmp, tmp, tmp2); break;
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case 1: gen_helper_neon_padd_u16(tmp, tmp, tmp2); break;
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case 2: tcg_gen_add_i32(tmp, tmp, tmp2); break;
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default: abort();
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}
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break;
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case NEON_3R_FLOAT_ARITH: /* Floating point arithmetic. */
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{
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TCGv_ptr fpstatus = get_fpstatus_ptr(1);
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