pnv_phb4_pec: Move pnv_phb4_get_pec() to rightful file
The function pnv_phb4_get_pec() exposes some internals of the PEC and PHB logic, yet it was in the higher level hw/ppc/pnv.c file for historical reasons: P8 implements the PHBs from pnv.c directly, but on P9/P10, it's done through the CEC model, which has its own file. So move pnv_phb4_get_pec() to hw/pci-host/pnv_phb4_pec.c, where it fits naturally. While at it, replace the PnvPHB4 parameter by the PnvPHB front-end, since it has all the information needed and simplify it a bit. No functional changes. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Message-Id: <20230302163715.129635-4-fbarrat@linux.ibm.com> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
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@ -112,6 +112,46 @@ static const MemoryRegionOps pnv_pec_pci_xscom_ops = {
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.endianness = DEVICE_BIG_ENDIAN,
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};
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PnvPhb4PecState *pnv_phb4_get_pec(PnvChip *chip, PnvPHB *phb, Error **errp)
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{
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PnvPhb4PecState *pecs = NULL;
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int chip_id = phb->chip_id;
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int index = phb->phb_id;
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int i, j;
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if (phb->version == 4) {
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Pnv9Chip *chip9 = PNV9_CHIP(chip);
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pecs = chip9->pecs;
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} else if (phb->version == 5) {
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Pnv10Chip *chip10 = PNV10_CHIP(chip);
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pecs = chip10->pecs;
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} else {
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g_assert_not_reached();
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}
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for (i = 0; i < chip->num_pecs; i++) {
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/*
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* For each PEC, check the amount of phbs it supports
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* and see if the given phb4 index matches an index.
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*/
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PnvPhb4PecState *pec = &pecs[i];
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for (j = 0; j < pec->num_phbs; j++) {
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if (index == pnv_phb4_pec_get_phb_id(pec, j)) {
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pec->phbs[j] = phb;
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return pec;
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}
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}
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}
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error_setg(errp,
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"pnv-phb4 chip-id %d index %d didn't match any existing PEC",
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chip_id, index);
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return NULL;
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}
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static PnvPHB *pnv_pec_default_phb_realize(PnvPhb4PecState *pec,
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int stack_no,
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Error **errp)
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44
hw/ppc/pnv.c
44
hw/ppc/pnv.c
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@ -284,48 +284,6 @@ static void pnv_dt_icp(PnvChip *chip, void *fdt, uint32_t pir,
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g_free(reg);
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}
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static PnvPhb4PecState *pnv_phb4_get_pec(PnvChip *chip, PnvPHB4 *phb,
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Error **errp)
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{
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PnvPHB *phb_base = phb->phb_base;
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PnvPhb4PecState *pecs = NULL;
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int chip_id = phb->chip_id;
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int index = phb->phb_id;
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int i, j;
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if (phb_base->version == 4) {
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Pnv9Chip *chip9 = PNV9_CHIP(chip);
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pecs = chip9->pecs;
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} else if (phb_base->version == 5) {
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Pnv10Chip *chip10 = PNV10_CHIP(chip);
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pecs = chip10->pecs;
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} else {
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g_assert_not_reached();
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}
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for (i = 0; i < chip->num_pecs; i++) {
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/*
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* For each PEC, check the amount of phbs it supports
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* and see if the given phb4 index matches an index.
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*/
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PnvPhb4PecState *pec = &pecs[i];
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for (j = 0; j < pec->num_phbs; j++) {
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if (index == pnv_phb4_pec_get_phb_id(pec, j)) {
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pec->phbs[j] = phb->phb_base;
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return pec;
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}
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}
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}
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error_setg(errp,
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"pnv-phb4 chip-id %d index %d didn't match any existing PEC",
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chip_id, index);
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return NULL;
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}
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/*
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* Adds a PnvPHB to the chip. Returns the parent obj of the
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* PHB which varies with each version (phb version 3 is parented
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@ -349,7 +307,7 @@ Object *pnv_chip_add_phb(PnvChip *chip, PnvPHB *phb, Error **errp)
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return OBJECT(chip);
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}
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phb->pec = pnv_phb4_get_pec(chip, PNV_PHB4(phb->backend), errp);
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phb->pec = pnv_phb4_get_pec(chip, phb, errp);
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return OBJECT(phb->pec);
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}
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@ -157,6 +157,7 @@ struct PnvPHB4 {
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void pnv_phb4_pic_print_info(PnvPHB4 *phb, Monitor *mon);
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int pnv_phb4_pec_get_phb_id(PnvPhb4PecState *pec, int stack_index);
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PnvPhb4PecState *pnv_phb4_get_pec(PnvChip *chip, PnvPHB *phb, Error **errp);
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void pnv_phb4_bus_init(DeviceState *dev, PnvPHB4 *phb);
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extern const MemoryRegionOps pnv_phb4_xscom_ops;
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