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i.MX: Fix GPIO ISR register write 

Writing the ISR register is supposed to clear interrupt status bits,
not to set them.

This patch makes '-M sabrelite' work without devicetree changes (Linux
kernel versions 3.18 to 4.7 with imx_v6_v7_defconfig and up to v4.8 with
multi_v7_defconfig; mainline has different problems).

Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Message-id: 1477361005-18646-1-git-send-email-linux@roeck-us.net
Acked-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Guenter Roeck 2016-10-28 14:12:31 +01:00 committed by Peter Maydell
parent fd209e4a77
commit fb70029b50
1 changed files with 1 additions and 1 deletions
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2
hw/gpio/imx_gpio.c
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@ -237,7 +237,7 @@ static void imx_gpio_write(void *opaque, hwaddr offset, uint64_t value,
break;
case ISR_ADDR:
s->isr |= ~value;
s->isr &= ~value;
imx_gpio_set_all_int_lines(s);
break;