OpenE2K
/
qemu-e2k
13
4
Fork 0
Code Issues 4 Pull Requests Projects 2 Releases Activity

hw/net/can: fix Xilinx ZynqMP CAN RX FIFO logic 

For consistency, function "update_rx_fifo()" should use the RX FIFO
register field names, not the TX FIFO ones, even if they refer to the
same bit positions in the register.

Signed-off-by: Anton Kochkov <anton.kochkov@proton.me>
Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com>
Message-id: 20220817141754.2105981-1-anton.kochkov@proton.me
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1123
[PMM: tweaked commit message]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Anton Kochkov 2022-08-17 14:22:03 +00:00 committed by Peter Maydell
parent 6338c30111
commit fb96d131ee
1 changed files with 16 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

32
hw/net/can/xlnx-zynqmp-can.c
View File

@ -696,30 +696,30 @@ static void update_rx_fifo(XlnxZynqMPCANState *s, const qemu_can_frame *frame)
timestamp));
/* First 32 bit of the data. */
fifo32_push(&s->rx_fifo, deposit32(0, R_TXFIFO_DATA1_DB3_SHIFT,
R_TXFIFO_DATA1_DB3_LENGTH,
fifo32_push(&s->rx_fifo, deposit32(0, R_RXFIFO_DATA1_DB3_SHIFT,
R_RXFIFO_DATA1_DB3_LENGTH,
frame->data[0]) |
deposit32(0, R_TXFIFO_DATA1_DB2_SHIFT,
R_TXFIFO_DATA1_DB2_LENGTH,
deposit32(0, R_RXFIFO_DATA1_DB2_SHIFT,
R_RXFIFO_DATA1_DB2_LENGTH,
frame->data[1]) |
deposit32(0, R_TXFIFO_DATA1_DB1_SHIFT,
R_TXFIFO_DATA1_DB1_LENGTH,
deposit32(0, R_RXFIFO_DATA1_DB1_SHIFT,
R_RXFIFO_DATA1_DB1_LENGTH,
frame->data[2]) |
deposit32(0, R_TXFIFO_DATA1_DB0_SHIFT,
R_TXFIFO_DATA1_DB0_LENGTH,
deposit32(0, R_RXFIFO_DATA1_DB0_SHIFT,
R_RXFIFO_DATA1_DB0_LENGTH,
frame->data[3]));
/* Last 32 bit of the data. */
fifo32_push(&s->rx_fifo, deposit32(0, R_TXFIFO_DATA2_DB7_SHIFT,
R_TXFIFO_DATA2_DB7_LENGTH,
fifo32_push(&s->rx_fifo, deposit32(0, R_RXFIFO_DATA2_DB7_SHIFT,
R_RXFIFO_DATA2_DB7_LENGTH,
frame->data[4]) |
deposit32(0, R_TXFIFO_DATA2_DB6_SHIFT,
R_TXFIFO_DATA2_DB6_LENGTH,
deposit32(0, R_RXFIFO_DATA2_DB6_SHIFT,
R_RXFIFO_DATA2_DB6_LENGTH,
frame->data[5]) |
deposit32(0, R_TXFIFO_DATA2_DB5_SHIFT,
R_TXFIFO_DATA2_DB5_LENGTH,
deposit32(0, R_RXFIFO_DATA2_DB5_SHIFT,
R_RXFIFO_DATA2_DB5_LENGTH,
frame->data[6]) |
deposit32(0, R_TXFIFO_DATA2_DB4_SHIFT,
R_TXFIFO_DATA2_DB4_LENGTH,
deposit32(0, R_RXFIFO_DATA2_DB4_SHIFT,
R_RXFIFO_DATA2_DB4_LENGTH,
frame->data[7]));
ARRAY_FIELD_DP32(s->regs, INTERRUPT_STATUS_REGISTER, RXOK, 1);