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hw/intc/arm_gic: Fix group priority computation for group 1 IRQs

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When determining the group priority of a group 1 IRQ, if C_CTRL.CBPR is
0, the non-secure BPR value is used. However, this value must be
incremented by one so that it matches the secure world number of
implemented priority bits (NS world has one less priority bit compared
to the Secure world).

Signed-off-by: Luc MICHEL <luc.michel@git.antfield.fr>
Message-id: 20180119145756.7629-5-luc.michel@greensocs.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: add assert, as the gicv3 code has]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Luc MICHEL 2018-01-25 11:45:30 +00:00 committed by Peter Maydell
parent 71aa735b0a
commit fc05a6f22a
1 changed files with 2 additions and 1 deletions
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hw/intc/arm_gic.c
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@ -256,7 +256,8 @@ static int gic_get_group_priority(GICState *s, int cpu, int irq)
if (gic_has_groups(s) &&
!(s->cpu_ctlr[cpu] & GICC_CTLR_CBPR) &&
GIC_TEST_GROUP(irq, (1 << cpu))) {
bpr = s->abpr[cpu];
bpr = s->abpr[cpu] - 1;
assert(bpr >= 0);
} else {
bpr = s->bpr[cpu];
}