hw/arm/raspi: add a skeleton implementation of the CPRMAN
The BCM2835 CPRMAN is the clock manager of the SoC. It is composed of a main oscillator, and several sub-components (PLLs, multiplexers, ...) to generate the BCM2835 clock tree. This commit adds a skeleton of the CPRMAN, with a dummy register read/write implementation. It embeds the main oscillator (xosc) from which all the clocks will be derived. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Luc Michel <luc@lmichel.fr> Tested-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -121,6 +121,9 @@ static void bcm2835_peripherals_init(Object *obj)
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/* DWC2 */
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object_initialize_child(obj, "dwc2", &s->dwc2, TYPE_DWC2_USB);
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/* CPRMAN clock manager */
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object_initialize_child(obj, "cprman", &s->cprman, TYPE_BCM2835_CPRMAN);
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object_property_add_const_link(OBJECT(&s->dwc2), "dma-mr",
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OBJECT(&s->gpu_bus_mr));
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}
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@ -160,6 +163,13 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
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return;
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}
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/* CPRMAN clock manager */
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->cprman), errp)) {
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return;
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}
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memory_region_add_subregion(&s->peri_mr, CPRMAN_OFFSET,
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sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->cprman), 0));
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memory_region_add_subregion(&s->peri_mr, ARMCTRL_IC_OFFSET,
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sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->ic), 0));
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sysbus_pass_irq(SYS_BUS_DEVICE(s), SYS_BUS_DEVICE(&s->ic));
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@ -355,7 +365,6 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
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create_unimp(s, &s->txp, "bcm2835-txp", TXP_OFFSET, 0x1000);
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create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40);
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create_unimp(s, &s->powermgt, "bcm2835-powermgt", PM_OFFSET, 0x114);
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create_unimp(s, &s->cprman, "bcm2835-cprman", CPRMAN_OFFSET, 0x2000);
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create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100);
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create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100);
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create_unimp(s, &s->spi[0], "bcm2835-spi0", SPI0_OFFSET, 0x20);
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163
hw/misc/bcm2835_cprman.c
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163
hw/misc/bcm2835_cprman.c
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@ -0,0 +1,163 @@
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/*
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* BCM2835 CPRMAN clock manager
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*
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* Copyright (c) 2020 Luc Michel <luc@lmichel.fr>
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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/*
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* This peripheral is roughly divided into 3 main parts:
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* - the PLLs
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* - the PLL channels
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* - the clock muxes
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*
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* A main oscillator (xosc) feeds all the PLLs. Each PLLs has one or more
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* channels. Those channel are then connected to the clock muxes. Each mux has
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* multiples sources (usually the xosc, some of the PLL channels and some "test
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* debug" clocks). A mux is configured to select a given source through its
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* control register. Each mux has one output clock that also goes out of the
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* CPRMAN. This output clock usually connects to another peripheral in the SoC
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* (so a given mux is dedicated to a peripheral).
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*
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* At each level (PLL, channel and mux), the clock can be altered through
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* dividers (and multipliers in case of the PLLs), and can be disabled (in this
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* case, the next levels see no clock).
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*
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* This can be sum-up as follows (this is an example and not the actual BCM2835
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* clock tree):
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*
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* /-->[PLL]-|->[PLL channel]--... [mux]--> to peripherals
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* | |->[PLL channel] muxes takes [mux]
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* | \->[PLL channel] inputs from [mux]
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* | some channels [mux]
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* [xosc]---|-->[PLL]-|->[PLL channel] and other srcs [mux]
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* | \->[PLL channel] ...-->[mux]
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* | [mux]
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* \-->[PLL]--->[PLL channel] [mux]
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*
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* The page at https://elinux.org/The_Undocumented_Pi gives the actual clock
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* tree configuration.
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*/
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#include "qemu/osdep.h"
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#include "qemu/log.h"
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#include "migration/vmstate.h"
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#include "hw/qdev-properties.h"
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#include "hw/misc/bcm2835_cprman.h"
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#include "hw/misc/bcm2835_cprman_internals.h"
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#include "trace.h"
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/* CPRMAN "top level" model */
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static uint64_t cprman_read(void *opaque, hwaddr offset,
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unsigned size)
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{
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BCM2835CprmanState *s = CPRMAN(opaque);
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uint64_t r = 0;
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size_t idx = offset / sizeof(uint32_t);
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switch (idx) {
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default:
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r = s->regs[idx];
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}
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trace_bcm2835_cprman_read(offset, r);
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return r;
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}
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static void cprman_write(void *opaque, hwaddr offset,
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uint64_t value, unsigned size)
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{
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BCM2835CprmanState *s = CPRMAN(opaque);
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size_t idx = offset / sizeof(uint32_t);
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if (FIELD_EX32(value, CPRMAN, PASSWORD) != CPRMAN_PASSWORD) {
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trace_bcm2835_cprman_write_invalid_magic(offset, value);
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return;
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}
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value &= ~R_CPRMAN_PASSWORD_MASK;
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trace_bcm2835_cprman_write(offset, value);
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s->regs[idx] = value;
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}
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static const MemoryRegionOps cprman_ops = {
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.read = cprman_read,
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.write = cprman_write,
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.endianness = DEVICE_LITTLE_ENDIAN,
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.valid = {
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/*
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* Although this hasn't been checked against real hardware, nor the
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* information can be found in a datasheet, it seems reasonable because
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* of the "PASSWORD" magic value found in every registers.
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*/
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.min_access_size = 4,
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.max_access_size = 4,
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.unaligned = false,
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},
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.impl = {
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.max_access_size = 4,
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},
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};
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static void cprman_reset(DeviceState *dev)
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{
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BCM2835CprmanState *s = CPRMAN(dev);
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memset(s->regs, 0, sizeof(s->regs));
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clock_update_hz(s->xosc, s->xosc_freq);
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}
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static void cprman_init(Object *obj)
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{
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BCM2835CprmanState *s = CPRMAN(obj);
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s->xosc = clock_new(obj, "xosc");
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memory_region_init_io(&s->iomem, obj, &cprman_ops,
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s, "bcm2835-cprman", 0x2000);
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sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->iomem);
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}
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static const VMStateDescription cprman_vmstate = {
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.name = TYPE_BCM2835_CPRMAN,
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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VMSTATE_UINT32_ARRAY(regs, BCM2835CprmanState, CPRMAN_NUM_REGS),
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VMSTATE_END_OF_LIST()
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}
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};
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static Property cprman_properties[] = {
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DEFINE_PROP_UINT32("xosc-freq-hz", BCM2835CprmanState, xosc_freq, 19200000),
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DEFINE_PROP_END_OF_LIST()
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};
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static void cprman_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->reset = cprman_reset;
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dc->vmsd = &cprman_vmstate;
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device_class_set_props(dc, cprman_properties);
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}
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static const TypeInfo cprman_info = {
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.name = TYPE_BCM2835_CPRMAN,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(BCM2835CprmanState),
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.class_init = cprman_class_init,
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.instance_init = cprman_init,
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};
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static void cprman_register_types(void)
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{
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type_register_static(&cprman_info);
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}
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type_init(cprman_register_types);
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@ -74,6 +74,7 @@ softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files(
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'bcm2835_property.c',
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'bcm2835_rng.c',
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'bcm2835_thermal.c',
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'bcm2835_cprman.c',
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))
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softmmu_ss.add(when: 'CONFIG_SLAVIO', if_true: files('slavio_misc.c'))
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softmmu_ss.add(when: 'CONFIG_ZYNQ', if_true: files('zynq_slcr.c', 'zynq-xadc.c'))
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@ -230,3 +230,8 @@ grlib_apb_pnp_read(uint64_t addr, uint32_t value) "APB PnP read addr:0x%03"PRIx6
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# pca9552.c
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pca955x_gpio_status(const char *description, const char *buf) "%s GPIOs 0-15 [%s]"
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pca955x_gpio_change(const char *description, unsigned id, unsigned prev_state, unsigned current_state) "%s GPIO id:%u status: %u -> %u"
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# bcm2835_cprman.c
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bcm2835_cprman_read(uint64_t offset, uint64_t value) "offset:0x%" PRIx64 " value:0x%" PRIx64
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bcm2835_cprman_write(uint64_t offset, uint64_t value) "offset:0x%" PRIx64 " value:0x%" PRIx64
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bcm2835_cprman_write_invalid_magic(uint64_t offset, uint64_t value) "offset:0x%" PRIx64 " value:0x%" PRIx64
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@ -23,6 +23,7 @@
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#include "hw/misc/bcm2835_mbox.h"
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#include "hw/misc/bcm2835_mphi.h"
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#include "hw/misc/bcm2835_thermal.h"
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#include "hw/misc/bcm2835_cprman.h"
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#include "hw/sd/sdhci.h"
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#include "hw/sd/bcm2835_sdhost.h"
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#include "hw/gpio/bcm2835_gpio.h"
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@ -48,7 +49,7 @@ struct BCM2835PeripheralState {
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UnimplementedDeviceState txp;
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UnimplementedDeviceState armtmr;
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UnimplementedDeviceState powermgt;
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UnimplementedDeviceState cprman;
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BCM2835CprmanState cprman;
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PL011State uart0;
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BCM2835AuxState aux;
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BCM2835FBState fb;
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37
include/hw/misc/bcm2835_cprman.h
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37
include/hw/misc/bcm2835_cprman.h
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@ -0,0 +1,37 @@
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/*
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* BCM2835 CPRMAN clock manager
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*
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* Copyright (c) 2020 Luc Michel <luc@lmichel.fr>
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#ifndef HW_MISC_CPRMAN_H
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#define HW_MISC_CPRMAN_H
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#include "hw/sysbus.h"
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#include "hw/qdev-clock.h"
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#define TYPE_BCM2835_CPRMAN "bcm2835-cprman"
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typedef struct BCM2835CprmanState BCM2835CprmanState;
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DECLARE_INSTANCE_CHECKER(BCM2835CprmanState, CPRMAN,
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TYPE_BCM2835_CPRMAN)
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#define CPRMAN_NUM_REGS (0x2000 / sizeof(uint32_t))
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struct BCM2835CprmanState {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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MemoryRegion iomem;
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uint32_t regs[CPRMAN_NUM_REGS];
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uint32_t xosc_freq;
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Clock *xosc;
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};
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#endif
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24
include/hw/misc/bcm2835_cprman_internals.h
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24
include/hw/misc/bcm2835_cprman_internals.h
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@ -0,0 +1,24 @@
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/*
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* BCM2835 CPRMAN clock manager
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*
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* Copyright (c) 2020 Luc Michel <luc@lmichel.fr>
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#ifndef HW_MISC_CPRMAN_INTERNALS_H
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#define HW_MISC_CPRMAN_INTERNALS_H
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#include "hw/registerfields.h"
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#include "hw/misc/bcm2835_cprman.h"
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/* Register map */
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/*
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* This field is common to all registers. Each register write value must match
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* the CPRMAN_PASSWORD magic value in its 8 MSB.
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*/
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FIELD(CPRMAN, PASSWORD, 24, 8)
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#define CPRMAN_PASSWORD 0x5a
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#endif
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