target/mips: Fix emulation of microMIPS R6 <SELEQZ|SELNEZ>.<D|S>
Fix emulation of microMIPS R6 <SELEQZ|SELNEZ>.<D|S> instructions. Their handling was permuted. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Matthew Fortune <matthew.fortune@mips.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
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@ -15643,15 +15643,15 @@ static void decode_micromips32_opc(CPUMIPSState *env, DisasContext *ctx)
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case 0x38:
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/* cmovs */
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switch ((ctx->opcode >> 6) & 0x7) {
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case MOVN_FMT: /* SELNEZ_FMT */
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case MOVN_FMT: /* SELEQZ_FMT */
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if (ctx->insn_flags & ISA_MIPS32R6) {
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/* SELNEZ_FMT */
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/* SELEQZ_FMT */
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switch ((ctx->opcode >> 9) & 0x3) {
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case FMT_SDPS_S:
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gen_sel_s(ctx, OPC_SELNEZ_S, rd, rt, rs);
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gen_sel_s(ctx, OPC_SELEQZ_S, rd, rt, rs);
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break;
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case FMT_SDPS_D:
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gen_sel_d(ctx, OPC_SELNEZ_D, rd, rt, rs);
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gen_sel_d(ctx, OPC_SELEQZ_D, rd, rt, rs);
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break;
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default:
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goto pool32f_invalid;
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@ -15665,15 +15665,15 @@ static void decode_micromips32_opc(CPUMIPSState *env, DisasContext *ctx)
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check_insn_opc_removed(ctx, ISA_MIPS32R6);
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FINSN_3ARG_SDPS(MOVN);
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break;
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case MOVZ_FMT: /* SELEQZ_FMT */
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case MOVZ_FMT: /* SELNEZ_FMT */
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if (ctx->insn_flags & ISA_MIPS32R6) {
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/* SELEQZ_FMT */
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/* SELNEZ_FMT */
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switch ((ctx->opcode >> 9) & 0x3) {
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case FMT_SDPS_S:
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gen_sel_s(ctx, OPC_SELEQZ_S, rd, rt, rs);
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gen_sel_s(ctx, OPC_SELNEZ_S, rd, rt, rs);
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break;
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case FMT_SDPS_D:
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gen_sel_d(ctx, OPC_SELEQZ_D, rd, rt, rs);
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gen_sel_d(ctx, OPC_SELNEZ_D, rd, rt, rs);
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break;
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default:
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goto pool32f_invalid;
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