ppc/pnv: Subclass quad xscom callbacks
Make the existing pnv_quad_xscom_read/write be P9 specific, in preparation for a different P10 callback. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com> Message-ID: <20230704054204.168547-3-joel@jms.id.au> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
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11
hw/ppc/pnv.c
11
hw/ppc/pnv.c
@ -1429,14 +1429,15 @@ static void pnv_chip_power9_instance_init(Object *obj)
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}
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static void pnv_chip_quad_realize_one(PnvChip *chip, PnvQuad *eq,
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PnvCore *pnv_core)
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PnvCore *pnv_core,
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const char *type)
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{
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char eq_name[32];
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int core_id = CPU_CORE(pnv_core)->core_id;
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snprintf(eq_name, sizeof(eq_name), "eq[%d]", core_id);
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object_initialize_child_with_props(OBJECT(chip), eq_name, eq,
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sizeof(*eq), TYPE_PNV_QUAD,
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sizeof(*eq), type,
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&error_fatal, NULL);
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object_property_set_int(OBJECT(eq), "quad-id", core_id, &error_fatal);
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@ -1454,7 +1455,8 @@ static void pnv_chip_quad_realize(Pnv9Chip *chip9, Error **errp)
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for (i = 0; i < chip9->nr_quads; i++) {
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PnvQuad *eq = &chip9->quads[i];
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pnv_chip_quad_realize_one(chip, eq, chip->cores[i * 4]);
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pnv_chip_quad_realize_one(chip, eq, chip->cores[i * 4],
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PNV_QUAD_TYPE_NAME("power9"));
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pnv_xscom_add_subregion(chip, PNV9_XSCOM_EQ_BASE(eq->quad_id),
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&eq->xscom_regs);
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@ -1666,7 +1668,8 @@ static void pnv_chip_power10_quad_realize(Pnv10Chip *chip10, Error **errp)
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for (i = 0; i < chip10->nr_quads; i++) {
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PnvQuad *eq = &chip10->quads[i];
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pnv_chip_quad_realize_one(chip, eq, chip->cores[i * 4]);
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pnv_chip_quad_realize_one(chip, eq, chip->cores[i * 4],
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PNV_QUAD_TYPE_NAME("power9"));
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pnv_xscom_add_subregion(chip, PNV10_XSCOM_EQ_BASE(eq->quad_id),
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&eq->xscom_regs);
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@ -407,12 +407,14 @@ static const MemoryRegionOps pnv_quad_power9_xscom_ops = {
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static void pnv_quad_realize(DeviceState *dev, Error **errp)
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{
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PnvQuad *eq = PNV_QUAD(dev);
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PnvQuadClass *pqc = PNV_QUAD_GET_CLASS(eq);
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char name[32];
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snprintf(name, sizeof(name), "xscom-quad.%d", eq->quad_id);
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pnv_xscom_region_init(&eq->xscom_regs, OBJECT(dev),
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&pnv_quad_power9_xscom_ops,
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eq, name, PNV9_XSCOM_EQ_SIZE);
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pqc->xscom_ops,
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eq, name,
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pqc->xscom_size);
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}
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static Property pnv_quad_properties[] = {
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@ -420,6 +422,14 @@ static Property pnv_quad_properties[] = {
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DEFINE_PROP_END_OF_LIST(),
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};
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static void pnv_quad_power9_class_init(ObjectClass *oc, void *data)
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{
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PnvQuadClass *pqc = PNV_QUAD_CLASS(oc);
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pqc->xscom_ops = &pnv_quad_power9_xscom_ops;
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pqc->xscom_size = PNV9_XSCOM_EQ_SIZE;
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}
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static void pnv_quad_class_init(ObjectClass *oc, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(oc);
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@ -429,16 +439,20 @@ static void pnv_quad_class_init(ObjectClass *oc, void *data)
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dc->user_creatable = false;
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}
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static const TypeInfo pnv_quad_info = {
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.name = TYPE_PNV_QUAD,
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.parent = TYPE_DEVICE,
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.instance_size = sizeof(PnvQuad),
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.class_init = pnv_quad_class_init,
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static const TypeInfo pnv_quad_infos[] = {
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{
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.name = TYPE_PNV_QUAD,
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.parent = TYPE_DEVICE,
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.instance_size = sizeof(PnvQuad),
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.class_size = sizeof(PnvQuadClass),
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.class_init = pnv_quad_class_init,
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.abstract = true,
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},
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{
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.parent = TYPE_PNV_QUAD,
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.name = PNV_QUAD_TYPE_NAME("power9"),
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.class_init = pnv_quad_power9_class_init,
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},
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};
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static void pnv_core_register_types(void)
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{
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type_register_static(&pnv_quad_info);
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}
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type_init(pnv_core_register_types)
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DEFINE_TYPES(pnv_quad_infos);
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@ -60,8 +60,19 @@ static inline PnvCPUState *pnv_cpu_state(PowerPCCPU *cpu)
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return (PnvCPUState *)cpu->machine_data;
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}
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struct PnvQuadClass {
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DeviceClass parent_class;
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const MemoryRegionOps *xscom_ops;
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uint64_t xscom_size;
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};
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#define TYPE_PNV_QUAD "powernv-cpu-quad"
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OBJECT_DECLARE_SIMPLE_TYPE(PnvQuad, PNV_QUAD)
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#define PNV_QUAD_TYPE_SUFFIX "-" TYPE_PNV_QUAD
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#define PNV_QUAD_TYPE_NAME(cpu_model) cpu_model PNV_QUAD_TYPE_SUFFIX
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OBJECT_DECLARE_TYPE(PnvQuad, PnvQuadClass, PNV_QUAD)
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struct PnvQuad {
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DeviceState parent_obj;
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