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target/hppa: Replace c with uv in do_cond 

Prepare for proper indication of shladd unsigned overflow.
The UV indicator will be zero/not-zero instead of a single bit.

Tested-by: Helge Deller <deller@gmx.de>
Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2024-03-25 17:06:03 -10:00
parent 82d0c831ce
commit fe2d066a9e
1 changed files with 5 additions and 7 deletions
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12
target/hppa/translate.c
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@ -707,7 +707,7 @@ static bool cond_need_cb(int c)
*/ */
static DisasCond do_cond(DisasContext *ctx, unsigned cf, bool d, static DisasCond do_cond(DisasContext *ctx, unsigned cf, bool d,
TCGv_i64 res, TCGv_i64 cb_msb, TCGv_i64 sv) TCGv_i64 res, TCGv_i64 uv, TCGv_i64 sv)
{ {
DisasCond cond; DisasCond cond;
TCGv_i64 tmp; TCGv_i64 tmp;
@ -754,14 +754,12 @@ static DisasCond do_cond(DisasContext *ctx, unsigned cf, bool d,
} }
cond = cond_make_0_tmp(TCG_COND_EQ, tmp); cond = cond_make_0_tmp(TCG_COND_EQ, tmp);
break; break;
case 4: /* NUV / UV (!C / C) */ case 4: /* NUV / UV (!UV / UV) */
/* Only bit 0 of cb_msb is ever set. */ cond = cond_make_0(TCG_COND_EQ, uv);
cond = cond_make_0(TCG_COND_EQ, cb_msb);
break; break;
case 5: /* ZNV / VNZ (!C | Z / C & !Z) */ case 5: /* ZNV / VNZ (!UV | Z / UV & !Z) */
tmp = tcg_temp_new_i64(); tmp = tcg_temp_new_i64();
tcg_gen_neg_i64(tmp, cb_msb); tcg_gen_movcond_i64(TCG_COND_EQ, tmp, uv, ctx->zero, ctx->zero, res);
tcg_gen_and_i64(tmp, tmp, res);
if (!d) { if (!d) {
tcg_gen_ext32u_i64(tmp, tmp); tcg_gen_ext32u_i64(tmp, tmp);
} }