tcg/aarch64: Rationalize args to tcg_out_qemu_{ld,st}
Rename the 'ext' parameter 'data_type' to make the use clearer; pass it to tcg_out_qemu_st as well to even out the interfaces. Rename the 'otype' local 'addr_type' to make the use clearer. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -1851,22 +1851,21 @@ static void tcg_out_qemu_st_direct(TCGContext *s, MemOp memop,
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}
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static void tcg_out_qemu_ld(TCGContext *s, TCGReg data_reg, TCGReg addr_reg,
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MemOpIdx oi, TCGType ext)
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MemOpIdx oi, TCGType data_type)
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{
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MemOp memop = get_memop(oi);
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const TCGType otype = TARGET_LONG_BITS == 64 ? TCG_TYPE_I64 : TCG_TYPE_I32;
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TCGType addr_type = TARGET_LONG_BITS == 64 ? TCG_TYPE_I64 : TCG_TYPE_I32;
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/* Byte swapping is left to middle-end expansion. */
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tcg_debug_assert((memop & MO_BSWAP) == 0);
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#ifdef CONFIG_SOFTMMU
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unsigned mem_index = get_mmuidx(oi);
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tcg_insn_unit *label_ptr;
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tcg_out_tlb_read(s, addr_reg, memop, &label_ptr, mem_index, 1);
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tcg_out_qemu_ld_direct(s, memop, ext, data_reg,
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TCG_REG_X1, otype, addr_reg);
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add_qemu_ldst_label(s, true, oi, ext, data_reg, addr_reg,
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tcg_out_tlb_read(s, addr_reg, memop, &label_ptr, get_mmuidx(oi), 1);
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tcg_out_qemu_ld_direct(s, memop, data_type, data_reg,
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TCG_REG_X1, addr_type, addr_reg);
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add_qemu_ldst_label(s, true, oi, data_type, data_reg, addr_reg,
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s->code_ptr, label_ptr);
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#else /* !CONFIG_SOFTMMU */
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unsigned a_bits = get_alignment_bits(memop);
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@ -1874,33 +1873,32 @@ static void tcg_out_qemu_ld(TCGContext *s, TCGReg data_reg, TCGReg addr_reg,
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tcg_out_test_alignment(s, true, addr_reg, a_bits);
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}
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if (USE_GUEST_BASE) {
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tcg_out_qemu_ld_direct(s, memop, ext, data_reg,
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TCG_REG_GUEST_BASE, otype, addr_reg);
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tcg_out_qemu_ld_direct(s, memop, data_type, data_reg,
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TCG_REG_GUEST_BASE, addr_type, addr_reg);
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} else {
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tcg_out_qemu_ld_direct(s, memop, ext, data_reg,
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tcg_out_qemu_ld_direct(s, memop, data_type, data_reg,
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addr_reg, TCG_TYPE_I64, TCG_REG_XZR);
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}
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#endif /* CONFIG_SOFTMMU */
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}
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static void tcg_out_qemu_st(TCGContext *s, TCGReg data_reg, TCGReg addr_reg,
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MemOpIdx oi)
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MemOpIdx oi, TCGType data_type)
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{
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MemOp memop = get_memop(oi);
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const TCGType otype = TARGET_LONG_BITS == 64 ? TCG_TYPE_I64 : TCG_TYPE_I32;
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TCGType addr_type = TARGET_LONG_BITS == 64 ? TCG_TYPE_I64 : TCG_TYPE_I32;
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/* Byte swapping is left to middle-end expansion. */
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tcg_debug_assert((memop & MO_BSWAP) == 0);
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#ifdef CONFIG_SOFTMMU
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unsigned mem_index = get_mmuidx(oi);
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tcg_insn_unit *label_ptr;
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tcg_out_tlb_read(s, addr_reg, memop, &label_ptr, mem_index, 0);
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tcg_out_tlb_read(s, addr_reg, memop, &label_ptr, get_mmuidx(oi), 0);
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tcg_out_qemu_st_direct(s, memop, data_reg,
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TCG_REG_X1, otype, addr_reg);
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add_qemu_ldst_label(s, false, oi, (memop & MO_SIZE)== MO_64,
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data_reg, addr_reg, s->code_ptr, label_ptr);
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TCG_REG_X1, addr_type, addr_reg);
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add_qemu_ldst_label(s, false, oi, data_type, data_reg, addr_reg,
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s->code_ptr, label_ptr);
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#else /* !CONFIG_SOFTMMU */
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unsigned a_bits = get_alignment_bits(memop);
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if (a_bits) {
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@ -1908,7 +1906,7 @@ static void tcg_out_qemu_st(TCGContext *s, TCGReg data_reg, TCGReg addr_reg,
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}
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if (USE_GUEST_BASE) {
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tcg_out_qemu_st_direct(s, memop, data_reg,
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TCG_REG_GUEST_BASE, otype, addr_reg);
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TCG_REG_GUEST_BASE, addr_type, addr_reg);
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} else {
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tcg_out_qemu_st_direct(s, memop, data_reg,
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addr_reg, TCG_TYPE_I64, TCG_REG_XZR);
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@ -2249,7 +2247,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
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break;
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case INDEX_op_qemu_st_i32:
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case INDEX_op_qemu_st_i64:
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tcg_out_qemu_st(s, REG0(0), a1, a2);
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tcg_out_qemu_st(s, REG0(0), a1, a2, ext);
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break;
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case INDEX_op_bswap64_i64:
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