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target-ppc: Compute addition overflow without branches

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Cc: Alexander Graf <agraf@suse.de>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Richard Henderson 2013-02-19 23:52:15 -08:00 committed by Blue Swirl
parent 2fdcb62907
commit ffe30937c8
1 changed files with 14 additions and 34 deletions
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48
target-ppc/translate.c
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@ -746,35 +746,23 @@ static void gen_isel(DisasContext *ctx)
static inline void gen_op_arith_compute_ov(DisasContext *ctx, TCGv arg0,
TCGv arg1, TCGv arg2, int sub)
{
int l1;
TCGv t0;
TCGv t0 = tcg_temp_new();
l1 = gen_new_label();
/* Start with XER OV disabled, the most likely case */
tcg_gen_movi_tl(cpu_ov, 0);
t0 = tcg_temp_local_new();
tcg_gen_xor_tl(t0, arg0, arg1);
#if defined(TARGET_PPC64)
if (!ctx->sf_mode)
tcg_gen_ext32s_tl(t0, t0);
#endif
if (sub)
tcg_gen_brcondi_tl(TCG_COND_LT, t0, 0, l1);
else
tcg_gen_brcondi_tl(TCG_COND_GE, t0, 0, l1);
tcg_gen_xor_tl(cpu_ov, arg0, arg1);
tcg_gen_xor_tl(t0, arg1, arg2);
#if defined(TARGET_PPC64)
if (!ctx->sf_mode)
tcg_gen_ext32s_tl(t0, t0);
#endif
if (sub)
tcg_gen_brcondi_tl(TCG_COND_GE, t0, 0, l1);
else
tcg_gen_brcondi_tl(TCG_COND_LT, t0, 0, l1);
tcg_gen_movi_tl(cpu_ov, 1);
tcg_gen_movi_tl(cpu_so, 1);
gen_set_label(l1);
if (sub) {
tcg_gen_and_tl(cpu_ov, cpu_ov, t0);
} else {
tcg_gen_andc_tl(cpu_ov, cpu_ov, t0);
}
tcg_temp_free(t0);
#if defined(TARGET_PPC64)
if (!ctx->sf_mode) {
tcg_gen_ext32s_tl(cpu_ov, cpu_ov);
}
#endif
tcg_gen_shri_tl(cpu_ov, cpu_ov, TARGET_LONG_BITS - 1);
tcg_gen_or_tl(cpu_so, cpu_so, cpu_ov);
}
static inline void gen_op_arith_compute_ca(DisasContext *ctx, TCGv arg1,
@ -837,10 +825,6 @@ static inline void gen_op_arith_add(DisasContext *ctx, TCGv ret, TCGv arg1,
/* Start with XER CA disabled, the most likely case */
tcg_gen_movi_tl(cpu_ca, 0);
}
if (compute_ov) {
/* Start with XER OV disabled, the most likely case */
tcg_gen_movi_tl(cpu_ov, 0);
}
tcg_gen_add_tl(t0, arg1, arg2);
@ -1261,10 +1245,6 @@ static inline void gen_op_arith_subf(DisasContext *ctx, TCGv ret, TCGv arg1,
/* Start with XER CA disabled, the most likely case */
tcg_gen_movi_tl(cpu_ca, 0);
}
if (compute_ov) {
/* Start with XER OV disabled, the most likely case */
tcg_gen_movi_tl(cpu_ov, 0);
}
if (add_ca) {
tcg_gen_not_tl(t0, arg1);