OpenE2K/qemu-e2k
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e2k-v9.0.0
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414 Commits

Author SHA1 Message Date
Richard Henderson
2d9bb2371d target/sparc: Merge advance_jump_uncond_{never,always} into advance_jump_cond 
Handle these via TCG_COND_{ALWAYS,NEVER}.
Allow dc->npc to be variable, using gen_mov_pc_npc.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-11-05 12:05:55 -08:00
Richard Henderson
4a8d145d71 target/sparc: Merge gen_branch2 into advance_pc 
The function had only one caller.  Canonicalize the cpu_cond
test to TCG_COND_NE, the "natural" sense of its value.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-11-05 12:04:13 -08:00
Richard Henderson
c76c804509 target/sparc: Do flush_cond in advance_jump_cond 
Do this here instead of in each caller.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-11-05 12:03:47 -08:00
Richard Henderson
816f89b7d4 target/sparc: Always copy conditions into a new temporary 
This will allow the condition to live across changes to
the global cc variables.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-11-05 12:03:38 -08:00
Richard Henderson
c8507ebf74 target/sparc: Change DisasCompare.c2 to int 
We don't require c2 to be variable, so emphasize that.
We don't currently require c2 to be non-zero, but that will change.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-11-05 12:03:29 -08:00
Richard Henderson
dd7dbfcc00 target/sparc: Remove DisasCompare.is_bool 
Since we're going to feed cpu_cond to another comparison, we don't
reqire a boolean value -- anything non-zero is sufficient.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-11-05 12:03:23 -08:00
Richard Henderson
b597eedcce target/sparc: Remove CC_OP leftovers 
All instructions have been converted to generate
full condition codes explicitly.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-11-05 12:03:17 -08:00
Richard Henderson
68524e83f8 target/sparc: Remove CC_OP_TADDTV, CC_OP_TSUBTV 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-11-05 12:03:14 -08:00
Richard Henderson
f828df7443 target/sparc: Remove CC_OP_SUB, CC_OP_SUBX, CC_OP_TSUB 
These are all related and implementable with common code.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-11-05 12:03:11 -08:00
Richard Henderson
b989ce736e target/sparc: Remove CC_OP_ADD, CC_OP_ADDX, CC_OP_TADD 
These are all related and implementable with common code.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-11-05 12:02:59 -08:00
Richard Henderson
1326010322 target/sparc: Remove CC_OP_DIV 
Return both result and overflow from helper_[us]div.
Compute all flags explicitly in gen_op_[us]divcc.

Marginally improve the INT64_MIN special case in helper_sdiv.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-11-05 11:53:36 -08:00
Richard Henderson
2a45b73658 target/sparc: Remove CC_OP_LOGIC 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-11-05 11:53:32 -08:00
Richard Henderson
2a1905c79e target/sparc: Split psr and xcc into components 
Step in removing CC_OP: change the representation of CC_OP_FLAGS.
The 8 bits are distributed between 6 variables, which should make
it easy to keep up to date.

The code within cc_helper.c is quite ugly but is only temporary.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-11-05 11:53:13 -08:00
Richard Henderson
b1fa27fcc8 target/sparc: Introduce cpu_put_psr_icc 
Isolate linux-user from changes to icc representation.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-11-05 11:52:18 -08:00
Richard Henderson
ba9c09b40b target/sparc: Remove disas_sparc_legacy 
All instructions are now converted.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
3a38260e3c target/sparc: Convert FZERO, FONE to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
2f72264169 target/sparc: Move FPACK16, FPACKFIX to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
e2fa6bd1ad target/sparc: Move FPCMP* to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
40f9ad219b target/sparc: Convert FCMP, FCMPE to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
f7ec8155f5 target/sparc: Move FMOVR, FMOVcc, FMOVfcc to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
f4e18df576 target/sparc: Move FMOVq, FNEGq, FABSq to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
7b8e3e1a87 target/sparc: Move FdTOq, FxTOq to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
13ebcc7749 target/sparc: Move FiTOq, FsTOq to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
1617586f5a target/sparc: Move FqTOd, FqTOx to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
bd9c5c428f target/sparc: Move FqTOs, FqTOi to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
199d43efb1 target/sparc: Move FiTOd, FsTOd, FsTOx to decodetree 
Note that gen_ne_fop_DF was incorrectly named and does pass env.
The two sets of helpers should have been unified.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
8c94bcd850 target/sparc: Move gen_fop_FD insns to decodetree 
Move FdTOs, FdTOi, FxTOs.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
5e3b17bbe9 target/sparc: Move FDMULQ to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
ff4c711b8d target/sparc: Move FSMULD to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
a405623991 target/sparc: Move gen_fop_QQQ insns to decodetree 
Move FADDq, FSUBq, FMULq, FDIVq.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
f2a59b0ad7 target/sparc: Move gen_fop_DDD insns to decodetree 
Move FADDd, FSUBd, FMULd, FDIVd.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
c1514961e6 target/sparc: Move gen_fop_FFF insns to decodetree 
Move FADDs, FSUBs, FMULs, FDIVs.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
c995216bab target/sparc: Move FSQRTq to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
8aa418b3ef target/sparc: Move gen_fop_DD insns to decodetree 
Move FSQRTd, FxTOd, FdTOx.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
119cb94f69 target/sparc: Move gen_fop_FF insns to decodetree 
Move FSQRTs, FiTOs, FsTOi.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
4b6edc0a27 target/sparc: Move gen_gsr_fop_DDD insns to decodetree 
Move FPACK32, FALIGNDATA, BSHUFFLE.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
afb043448b target/sparc: Move PDIST to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
e06c9f83c6 target/sparc: Move gen_ne_fop_DDD insns to decodetree 
Move FMUL8x16, FMUL8x16AU, FMUL8x16AL, FMUL8SUx16, FMUL8ULx16,
FMULD8SUx16, FMULD8ULx16, FPMERGE, FEXPAND, FANDNOT1d, FANDNOT2d,
FANDd, FNANDd, FNORd, FORNOT1d, FORNOT2d, FORd, FPADD16d, FPADD32d,
FPSUB16d, FPSUB32d, FXNORd, FXORd.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
7f10b52f7b target/sparc: Move gen_ne_fop_FFF insns to decodetree 
Move FANDNOT1s, FANDNOT2s, FANDs, FNANDs, FNORs, FORNOT1s, FORNOT2s,
FORs, FPADD16s, FPADD32s, FPSUB16s, FPSUB32s, FXNORs, FXORs.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
fafba1bb0b target/sparc: Use tcg_gen_vec_{add,sub}* 
Replace the local helpers for the same integer operations.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
c6d83e4ff5 target/sparc: Move FMOVD, FNEGD, FABSD, FSRC*D, FNOT*D to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
baf3dbf258 target/sparc: Move FMOVS, FNEGS, FABSS, FSRC*S, FNOT*S to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
39ca3490f8 target/sparc: Move BMASK to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
9e20ca9409 target/sparc: Move ADDRALIGN* to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
45bfed3b2c target/sparc: Move ARRAY* to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
b88ce6f246 target/sparc: Move EDGE* to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
da68140604 target/sparc: Merge LDFSR, LDXFSR implementations 
Combine the helper to a single set_fsr().
Perform the mask and merge inline.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
3d3c06737b target/sparc: Move LDFSR, STFSR to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
287b11520b target/sparc: Move asi fp load/store to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
06c060d9e5 target/sparc: Move simple fp load/store to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
3259b9e2fd target/sparc: Split out fp ldst functions with asi precomputed 
Take the operation size from the MemOp instead of a
separate parameter.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
5458fd3153 target/sparc: Move PREFETCH, PREFETCHA to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
d0a11d25f0 target/sparc: Move CASA, CASXA to decodetree 
Remove gen_cas_asi, gen_casx_asi.
Rename gen_cas_asi0 to gen_cas_asi.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
dca544b991 target/sparc: Move SWAP, SWAPA to decodetree 
Remove gen_swap_asi.
Rename gen_swap_asi0 to gen_swap_asi.
Merge gen_swap into gen_swap_asi.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
cf07cd1e68 target/sparc: Move LDSTUB, LDSTUBA to decodetree 
Remove gen_ldstub_asi.
Rename gen_ldstub_asi0 to gen_ldstub_asi.
Merge gen_ldstub into gen_ldstub_asi.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
42071fc16d target/sparc: Move asi integer load/store to decodetree 
Move LDDA, LDSBA, LDSHA, LDSWA, LDUBA, LDUHA, LDUWA, LDXA,
STBA, STDA, STHA, STWA, STXA.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
0880d20b2e target/sparc: Move simple integer load/store to decodetree 
Move LDUW, LDUB, LDUH, LDD, LDSW, LDSB, LDSH, LDX,
STW, STB, STH, STD, STX.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
ebbbec9216 target/sparc: Use tcg_gen_qemu_{ld,st}_i128 for GET_ASI_DTWINX 
Perform one atomic 16-byte operation.
The atomicity is required for the LDTXA instructions.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
c03a0fd15c target/sparc: Split out ldst functions with asi pre-computed 
As an intermediate step in decodetree conversion, create
new functions passing in DisasASI and not insn.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
a76779ee3b target/sparc: Drop ifdef around get_asi and friends 
Mark some of the functions as unused, temporarily.
Fix up some tl vs i64 issues revealed in the process.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
811cc0b0ce target/sparc: Split out resolve_asi 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
8f75b8a4eb target/sparc: Move DONE, RETRY to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
d382580031 target/sparc: Move FLUSH, SAVE, RESTORE to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
86b82fe021 target/sparc: Move JMPL, RETT, RETURN to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
d3c7e8ad74 target/sparc: Convert remaining v8 coproc insns to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
9c6ec5bcad target/sparc: Move POPC to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
fb4ed7aad4 target/sparc: Move MOVcc, MOVR to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
5fc546ee35 target/sparc: Move SLL, SRL, SRA to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
a9aba13dae target/sparc: Move TADD, TSUB, MULS to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
c26368532d target/sparc: Move UDIV, SDIV to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
4ee85ea94b target/sparc: Move UDIVX, SDIVX to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
dfebb950da target/sparc: Move SUBC to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
b5372650e2 target/sparc: Move UMUL, SMUL to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
22188d7da8 target/sparc: Move MULX to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
420a187d80 target/sparc: Move ADDC to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
428881deba target/sparc: Move basic arithmetic to decodetree 
Move ADD, AND, OR, XOR, SUB, ANDN, ORN, XORN.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
2da789ded5 target/sparc: Remove cpu_hintp, cpu_htba, cpu_hver, cpu_ssr, cpu_ver 
Use direct loads and stores to env instead.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
577efa4557 target/sparc: Remove cpu_tick_cmpr, cpu_stick_cmpr, cpu_hstick_cmpr 
Use direct loads and stores to env instead.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
cd6269f7c9 target/sparc: Remove cpu_wim 
Use direct loads and stores to env instead.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
bb97f2f5d7 target/sparc: Move WRTBR, WRHPR to decodetree 
Implement htstate in the obvious way.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
9422278ef8 target/sparc: Move WRWIM, WRPR to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
25524734c6 target/sparc: Move WRPSR, SAVED, RESTORED to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
0faef01b39 target/sparc: Move WRASR to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
e8325dc02d target/sparc: Move RDTBR, FLUSHW to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
5d617bfba0 target/sparc: Move RDWIM, RDPR to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
668bb9b755 target/sparc: Move RDPSR, RDHPR to decodetree 
Implement htstate in the obvious way.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/847
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
af25071c1d target/sparc: Move RDASR, STBAR, MEMBAR to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
3037663616 target/sparc: Move Tcc to decodetree 
Use the new delay_exceptionv function in the implementation.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
6d2a076842 target/sparc: Move SETHI to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
9d4e2bc761 target/sparc: Pass DisasCompare to advance_jump_cond 
Fold the condition into the branch or movcond when possible.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
6b3e4cc685 target/sparc: Merge gen_branch_[an] with only caller 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:12 -07:00
Richard Henderson
d547193616 target/sparc: Merge gen_fcond with only caller 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:12 -07:00
Richard Henderson
1ea9c62a5e target/sparc: Merge gen_cond with only caller 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:12 -07:00
Richard Henderson
45196ea4f4 target/sparc: Move FBPfcc and FBfcc to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:12 -07:00
Richard Henderson
ab9ffe988a target/sparc: Move BPr to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:12 -07:00
Richard Henderson
276567aaf6 target/sparc: Move BPcc and Bicc to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:12 -07:00
Richard Henderson
23ada1b16f target/sparc: Move CALL to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:12 -07:00
Richard Henderson
b1bc09ea6b target/sparc: Define AM_CHECK for sparc32 
Define as false, which allows some ifdef removal.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:12 -07:00
Richard Henderson
878cc6773a target/sparc: Add decodetree infrastructure 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:12 -07:00
Richard Henderson
554abe47c7 target/sparc: Partition cpu features 
In the sparc32 binaries, do not advertise features only available
to sparc64, so they cannot be enabled.  In the sparc64 binaries,
do not advertise features mandatory in v9, so they cannot be disabled.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:12 -07:00