Autorefill tests in the phys_mem test suite are disabled for cores that
have spanning TLB way, i.e. for all MMUv3 cores. Instead of disabling it
invalidate TLB mappings for entries that conflict with the test.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Failed memory transactions should raise exceptions 14 (for fetch) or 15
(for load/store) with XEA2.
Memory accesses that result in TLB miss followed by an attempt to load
PTE from physical memory which fails should raise InstTLBMiss or
LoadStoreTLBMiss with XEA2.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>