2 Commits

Author	SHA1	Message	Date
Alistair Francis	2761db5fc2	target/riscv: Implement checks for hfence ... Call the helper_hyp_tlb_flush() function on hfence instructions which will generate an illegal insruction execption if we don't have permission to flush the Hypervisor level TLBs. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>	2020-06-19 08:24:07 -07:00
Michael Clark	0c3e702aca	RISC-V CPU Helpers ... Privileged control and status register helpers and page fault handling. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu> Signed-off-by: Michael Clark <mjc@sifive.com>	2018-03-07 08:30:28 +13:00