Commit Graph

8 Commits

Author SHA1 Message Date
Blue Swirl
b970ea8f8d Compile some MIPS devices only once
Move CPU specific declarations to a separate file.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-27 07:26:16 +00:00
Aurelien Jarno
7b9cbadb2b mips: add header to mips_int.c and mips_timer.c
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-14 23:30:44 +01:00
pbrook
87ecb68bdf Break up vl.h.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-17 17:14:51 +00:00
pbrook
d537cf6c86 Unify IRQ handling.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2635 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-07 18:14:41 +00:00
ths
a4bc3afc09 Malta CBUS UART support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2557 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-31 16:54:14 +00:00
ths
24c7b0e330 Sanitize mips exception handling.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2546 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-30 16:44:54 +00:00
ths
39d51eb8bc Fix BD flag handling, cause register contents, implement some more bits
for R2 interrupt handling.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2493 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-18 12:43:40 +00:00
ths
4de9b249d3 Reworking MIPS interrupt handling, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2350 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-24 01:47:51 +00:00