Commit Graph

8 Commits

Author SHA1 Message Date
pbrook
b3c7724cbc Move CPU save/load registration to common code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4808 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-30 16:31:04 +00:00
aurel32
4c54e87568 Remember the state of level-triggered interrupts
(Hollis Blanchard)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4330 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-04 13:15:24 +00:00
aurel32
50bf72b384 PPC UIC: Remove interrupt polarity code
(Hollis Blanchard)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4329 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-04 13:15:15 +00:00
aurel32
923e5e339f qemu ppc uic: Order IRQ bit number as described in the UIC documentation.
(Hollis Blanchard)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4273 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-28 00:00:24 +00:00
j_mayer
aae9366a03 More PowerPC debug print fixes - hardware emulation pass.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3726 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-24 02:56:36 +00:00
pbrook
87ecb68bdf Break up vl.h.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-17 17:14:51 +00:00
bellard
aaed909a49 added cpu_model parameter to cpu_init()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-10 15:15:54 +00:00
j_mayer
008ff9d756 Share devices that might be useful for all PowerPC 40x & 440 implementations
(mostly CPU registration and UIC, for now).


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3340 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-07 14:21:26 +00:00