Commit Graph

236 Commits

Author SHA1 Message Date
Richard Henderson 57a808b6d7 target-alpha: Raise IOV from CVTQL
Even if an exception isn't taken, the status flags need updating
and the result should be written to the destination.  Move the body
of cvtql out of line, since we now always need a call.

Reported-by: Al Viro <viro@ZenIV.linux.org.uk>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-05-18 13:03:47 -07:00
Richard Henderson b99e80694c target-alpha: Raise EXC_M_INV properly for fp inputs
Ignore DNZ if software completion isn't used.  Raise INV for
denormals in system mode so the OS completion handler sees them.

Reported-by: Al Viro <viro@ZenIV.linux.org.uk>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-05-18 13:03:47 -07:00
Richard Henderson ed0851380c target-alpha: Disallow literal operand to 1C.30 to 1C.37
Before 64f45e49 we used to have literal checks for 4 of these 8 opcodes.
Confirmed that real hardware doesn't allow them.

Reported-by: Al Viro <viro@ZenIV.linux.org.uk>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-05-18 13:03:47 -07:00
Richard Henderson 2517def6f8 target-alpha: Implement WH64EN
Backward compatible cache insn introduced for EV7.

Reported-by: Al Viro <viro@ZenIV.linux.org.uk>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-05-18 13:03:47 -07:00
Richard Henderson 4d1628e832 target-alpha: Fix integer overflow checking insns
We need to write the result to the destination register before
raising any exception.  Thus inline the code for each insn, and
check for any exception after we're done.

Reported-by: Al Viro <viro@ZenIV.linux.org.uk>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-05-18 13:03:47 -07:00
Richard Henderson c24a8a0b6d target-alpha: Raise IOV from CVTTQ
Floating-point overflow is a different bit from integer overflow.

Reported-by: Al Viro <viro@ZenIV.linux.org.uk>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-05-18 13:03:46 -07:00
Richard Henderson 471d493047 target-alpha: Set fpcr_exc_status even for disabled exceptions
The qualifiers can suppress the raising of exceptions, but real
hardware still records that the exceptions occurred.

Reported-by: Al Viro <viro@ZenIV.linux.org.uk>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-05-18 13:03:46 -07:00
Richard Henderson f3d3aad4a9 target-alpha: Tidy FPCR representation
Store the fpcr as the hardware represents it.  Convert the softfpu
representation of exceptions into the fpcr representation.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-05-18 13:03:46 -07:00
Richard Henderson 9d5a626b2c target-alpha: Forget installed round mode after MT_FPCR
When we use QUAL_RM_D, we copy fpcr_dyn_round to float_status.
When we install a new FPCR value, we update fpcr_dyn_round.
Reset the status of the cache so that we re-copy for the next
fp insn that requires dynamic rounding.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-05-18 13:03:46 -07:00
Richard Henderson 3da653fa05 target-alpha: Rename floating-point subroutines
... to match the instructions, which have no leading "f".

Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-05-18 13:03:46 -07:00
Richard Henderson 42a268c241 tcg: Change translator-side labels to a pointer
This is improved type checking for the translators -- it's no longer
possible to accidentally swap arguments to the branch functions.

Note that the code generating backends still manipulate labels as int.

With notable exceptions, the scope of the change is just a few lines
for each target, so it's not worth building extra machinery to do this
change in per-target increments.

Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Cc: Michael Walle <michael@walle.cc>
Cc: Leon Alrae <leon.alrae@imgtec.com>
Cc: Anthony Green <green@moxielogic.com>
Cc: Jia Liu <proljc@gmail.com>
Cc: Alexander Graf <agraf@suse.de>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Blue Swirl <blauwirbel@gmail.com>
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-03-13 12:28:18 -07:00
Richard Henderson fe700adb3d tcg: Introduce tcg_op_buf_count and tcg_op_buf_full
The method by which we count the number of ops emitted
is going to change.  Abstract that away into some inlines.

Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-02-12 21:21:38 -08:00
Richard Henderson 0a7df5da98 tcg: Move emit of INDEX_op_end into gen_tb_end
Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-02-12 21:21:38 -08:00
Paolo Bonzini cd42d5b236 gen-icount: check cflags instead of use_icount global
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-01-03 09:22:12 +01:00
Paolo Bonzini bd79255d25 translate: check cflags instead of use_icount global
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-01-03 09:22:10 +01:00
Lluís Vilanova a7e30d84ce trace: [tcg] Include TCG-tracing header on all targets
Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-08-12 14:26:12 +01:00
Paolo Bonzini f08b617018 softmmu: introduce cpu_ldst.h
This will collect all load and store helpers soon.  For now
it is just a replacement for softmmu_exec.h, which this patch
stops including directly, but we also include it where this will
be necessary in order to simplify the next patch.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05 16:10:33 +02:00
Richard Henderson 2ef6175aa7 tcg: Invert the inclusion of helper.h
Rather than include helper.h with N values of GEN_HELPER, include a
secondary file that sets up the macros to include helper.h.  This
minimizes the files that must be rebuilt when changing the macros
for file N.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28 09:33:54 -07:00
Richard Henderson 214bb280c6 target-alpha: Fix RDUSP
Commit 06ef8604e9 contained a typo.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-02 20:42:02 -07:00
Richard Henderson 06ef8604e9 target-alpha: Remove cpu_unique, cpu_sysval, cpu_usp
Technically, these variables could have been referenced both via
offsets from env and as TCG registers, which would be illegal.
Of course, that could only be done from PALcode, and ours doesn't
do that.

But honestly, these are used infrequently enough that they don't
really need to be TCG registers.  We wind up with exactly the same
code if we follow the letter of the law and issue explicit ld/st.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson 39acc64741 target-alpha: Tidy alpha_translate_init
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson e566be049a target-alpha: Don't issue goto_tb under singlestep
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson 8f811b9a4a target-alpha: Use non-local temps for zero/sink
These values are no longer live across branches.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson a9e05a1ceb target-alpha: Use extract to get insn fields
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson 0e154fe92c target-alpha: Convert mfpr/mtpr to source/sink
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson ef3765cb95 target-alpha: Convert gen_cpys et al to source/sink
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson e8d8fef48f target-alpha: Convert gen_fcvtlq/ql to source/sink
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson 6580935246 target-alpha: Convert gen_fcmov to source/sink
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson 76bff4f82f target-alpha: Convert gen_bcond to source/sink
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson e20b8c04a3 target-alpha: Convert most ieee insns to source/sink
This one fixes a bug, previously noted as supressing exceptions
in the (unlikely) case the destination register was $f31.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson 8b0190bbde target-alpha: Convert gen_ieee_input to source/sink
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson f477ed3c11 target-alpha: Convert MVIOP2 to source/sink
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson cd2754addc target-alpha: Convert ARITH3 to source/sink
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson 3d045dbca5 target-alpha: Convert FARITH3 to source/sink
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson baee04abba target-alpha: Convert FARITH2 to source/sink
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson b144be9e06 target-alpha: Convert gen_zap/not to source/sink
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson 5e5863ecf1 target-alpha: Convert gen_ins_h/l to source/sink
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson 9a734d64f9 target-alpha: Convert gen_ext_h/l to source/sink
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:42 -07:00
Richard Henderson 9a8fa1bdad target-alpha: Convert gen_msk_h/l to source/sink
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:41 -07:00
Richard Henderson 83ebb7cd01 target-alpha: Convert gen_cmov to source/sink
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:41 -07:00
Richard Henderson 42774a56ec target-alpha: Convert ARITH3_EX to source/sink
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:41 -07:00
Richard Henderson 958683482c target-alpha: Convert gen_cmp to source/sink
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:41 -07:00
Richard Henderson cd2d46fd21 target-alpha: Convert gen_store_conditional to source/sink
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:41 -07:00
Richard Henderson 595b8fdd54 target-alpha: Convert gen_load/store_mem to source/sink
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:41 -07:00
Richard Henderson a4af30447b target-alpha: Convert opcode 0x1F to source/sink
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:41 -07:00
Richard Henderson 46010969f3 target-alpha: Convert opcode 0x1E to source/sink
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:41 -07:00
Richard Henderson c67b67e511 target-alpha: Convert opcode 0x1C to source/sink
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:41 -07:00
Richard Henderson 1eaa1da7e4 target-alpha: Convert opcode 0x1B to source/sink
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:41 -07:00
Richard Henderson 8f56ced8aa target-alpha: Convert opcode 0x1A to source/sink
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:41 -07:00
Richard Henderson 89fe090bb3 target-alpha: Convert opcode 0x18 to source/sink
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-17 11:47:41 -07:00